Marge Bot pushed to branch master at Glasgow Haskell Compiler / GHC
Commits:
-
eee8ec5b
by Cheng Shao at 2026-07-14T18:00:20-04:00
4 changed files:
- + changelog.d/fix-cmm-atomic-load-store
- compiler/GHC/Cmm/Parser.y
- testsuite/tests/cmm/should_run/AtomicFetch.hs
- testsuite/tests/cmm/should_run/AtomicFetch_cmm.cmm
Changes:
| 1 | +section: cmm
|
|
| 2 | +synopsis: Fix miscompiled %load_relaxed primop, add missing %store_relaxed
|
|
| 3 | +issues: #27483
|
|
| 4 | +mrs: !16320 |
| ... | ... | @@ -1210,9 +1210,10 @@ callishMachOps platform = listToUFM $ |
| 1210 | 1210 | , allWidths "pext" MO_Pext
|
| 1211 | 1211 | , allWidths "cmpxchg" MO_Cmpxchg
|
| 1212 | 1212 | , allWidths "xchg" MO_Xchg
|
| 1213 | - , allWidths "load_relaxed" (\w -> MO_AtomicRead w MemOrderAcquire)
|
|
| 1213 | + , allWidths "load_relaxed" (\w -> MO_AtomicRead w MemOrderRelaxed)
|
|
| 1214 | 1214 | , allWidths "load_acquire" (\w -> MO_AtomicRead w MemOrderAcquire)
|
| 1215 | 1215 | , allWidths "load_seqcst" (\w -> MO_AtomicRead w MemOrderSeqCst)
|
| 1216 | + , allWidths "store_relaxed" (\w -> MO_AtomicWrite w MemOrderRelaxed)
|
|
| 1216 | 1217 | , allWidths "store_release" (\w -> MO_AtomicWrite w MemOrderRelease)
|
| 1217 | 1218 | , allWidths "store_seqcst" (\w -> MO_AtomicWrite w MemOrderSeqCst)
|
| 1218 | 1219 | , allWidths "fetch_add" (\w -> MO_AtomicRMW w AMO_Add)
|
| ... | ... | @@ -6,6 +6,7 @@ |
| 6 | 6 | |
| 7 | 7 | -- This is not a test of atomic semantics,
|
| 8 | 8 | -- just checking that GHC can parse %fetch_fooXX
|
| 9 | +-- and %load/%store with explicit ordering
|
|
| 9 | 10 | |
| 10 | 11 | import GHC.Exts
|
| 11 | 12 | import GHC.Int
|
| ... | ... | @@ -2,6 +2,7 @@ |
| 2 | 2 | |
| 3 | 3 | // This is not a test of atomic semantics,
|
| 4 | 4 | // just checking that GHC can parse %fetch_fooXX
|
| 5 | +// and %load/%store with explicit ordering
|
|
| 5 | 6 | |
| 6 | 7 | cmm_foo64 (P_ p)
|
| 7 | 8 | {
|
| ... | ... | @@ -19,6 +20,10 @@ cmm_foo64 (P_ p) |
| 19 | 20 | (x) = prim %fetch_xor64(q, 33 :: I64);
|
| 20 | 21 | (x) = prim %fetch_nand64(q, 127 :: I64);
|
| 21 | 22 | (x) = prim %load_seqcst64(q);
|
| 23 | + prim %store_relaxed64(q, x);
|
|
| 24 | + (x) = prim %load_relaxed64(q);
|
|
| 25 | + prim %store_release64(q, x);
|
|
| 26 | + (x) = prim %load_acquire64(q);
|
|
| 22 | 27 | return (x);
|
| 23 | 28 | }
|
| 24 | 29 | |
| ... | ... | @@ -38,6 +43,10 @@ cmm_foo32 (P_ p) |
| 38 | 43 | (x) = prim %fetch_xor32(q, 33 :: I32);
|
| 39 | 44 | (x) = prim %fetch_nand32(q, 127 :: I32);
|
| 40 | 45 | (x) = prim %load_seqcst32(q);
|
| 46 | + prim %store_relaxed32(q, x);
|
|
| 47 | + (x) = prim %load_relaxed32(q);
|
|
| 48 | + prim %store_release32(q, x);
|
|
| 49 | + (x) = prim %load_acquire32(q);
|
|
| 41 | 50 | return (x);
|
| 42 | 51 | }
|
| 43 | 52 | |
| ... | ... | @@ -57,6 +66,10 @@ cmm_foo16 (P_ p) |
| 57 | 66 | (x) = prim %fetch_xor16(q, 33 :: I16);
|
| 58 | 67 | (x) = prim %fetch_nand16(q, 127 :: I16);
|
| 59 | 68 | (x) = prim %load_seqcst16(q);
|
| 69 | + prim %store_relaxed16(q, x);
|
|
| 70 | + (x) = prim %load_relaxed16(q);
|
|
| 71 | + prim %store_release16(q, x);
|
|
| 72 | + (x) = prim %load_acquire16(q);
|
|
| 60 | 73 | return (x);
|
| 61 | 74 | }
|
| 62 | 75 | |
| ... | ... | @@ -76,5 +89,9 @@ cmm_foo8 (P_ p) |
| 76 | 89 | (x) = prim %fetch_xor8(q, 33 :: I8);
|
| 77 | 90 | (x) = prim %fetch_nand8(q, 127 :: I8);
|
| 78 | 91 | (x) = prim %load_seqcst8(q);
|
| 92 | + prim %store_relaxed8(q, x);
|
|
| 93 | + (x) = prim %load_relaxed8(q);
|
|
| 94 | + prim %store_release8(q, x);
|
|
| 95 | + (x) = prim %load_acquire8(q);
|
|
| 79 | 96 | return (x);
|
| 80 | 97 | } |