import GHC.Cmm.Dataflow.Label

 import GHC.Types.Unique.DSM

 import GHC.Types.Literal.Floating

 -- [General layout of an NCG]

 cmmTopCodeGen ::

 genPrim (MO_AtomicRead w mo)  [dst]  [addr]         = genAtomicRead w mo dst addr

 genPrim (MO_AtomicWrite w mo) []     [addr,val]     = genAtomicWrite w mo addr val

 genPrim mop@(MO_S_Mul2     _w) _         _          = unsupported mop

 genPrim mop@(MO_S_QuotRem  _w) _         _          = unsupported mop

 genPrim mop@(MO_U_QuotRem  _w) _         _          = unsupported mop

 genPrim (MO_Pdep width)      [dst]   [src,mask]     = genLibCCall (pdepLabel width) [dst] [src,mask]

 genPrim (MO_Pext width)      [dst]   [src,mask]     = genLibCCall (pextLabel width) [dst] [src,mask]

 genPrim (MO_UF_Conv width)   [dst]   [src]          = genLibCCall (word2FloatLabel width) [dst] [src]

 genPrim (MO_Memcpy _align)   []   [dst,src,n]       = genLibCCall (fsLit "memcpy")  [] [dst,src,n]

 genPrim (MO_Memmove _align)  []   [dst,src,n]       = genLibCCall (fsLit "memmove") [] [dst,src,n]

 genPrim (MO_Memcmp _align)   [rst]   [dst,src,n]    = genLibCCall (fsLit "memcmp")  [rst] [dst,src,n]

              )

     _ -> return ( code_x `snocOL` BITREV (OpReg w dst_reg) (OpReg w reg_x))

 -- Generate C call to the given function in libc

 genLibCCall :: FastString -> [CmmFormal] -> [CmmActual] -> NatM InstrBlock

 genLibCCall name dsts args = do

              )

     _ ->  panic $ "Unexpected MemOrderAcquire on an AtomicWrite" ++ show mo

 -- -----------------------------------------------------------------------------

 {-

 Generating C calls

 wider than FRLEN may be passed in a GAR.

 -}

 genCCall

   :: CmmExpr            -- address of func call

   -> ForeignConvention  -- calling convention

   -- ranges, corresponding to 2 and 1 instruction implementations respectively.

   --

   -- BCOND1 is selected by default.

   -- 5. Common Memory Access Instructions --------------------------------------

   LD _ dst src             -> usage (regOp src, regOp dst)

   LDU _ dst src            -> usage (regOp src, regOp dst)

   -- LDCOND dst src1 src2     -> usage (regOp src1 ++ regOp src2, regOp dst)

   -- STCOND dst src1 src2     -> usage (regOp src1 ++ regOp src2, regOp dst)

   -- 7. Atomic Memory Access Instructions --------------------------------------

   AMSWAPDB _ dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst)

   -- 8. Barrier Instructions ---------------------------------------------------

   DBAR _hint               -> usage ([], [])

   IBAR _hint               -> usage ([], [])

     TAIL36 r t     -> TAIL36 (patchOp r) (patchTarget t)

     BCOND1 c j d t -> BCOND1 c (patchOp j) (patchOp d) (patchTarget t)

     BCOND c j d t  -> BCOND c (patchOp j) (patchOp d) (patchTarget t)

     BEQZ j t       -> BEQZ (patchOp j) (patchTarget t)

     BNEZ j t       -> BNEZ (patchOp j) (patchTarget t)

     -- 5. Common Memory Access Instructions --------------------------------------

     -- STCOND o1 o2 o3       -> STCOND  (patchOp o1)  (patchOp o2)  (patchOp o3)

     -- 7. Atomic Memory Access Instructions --------------------------------------

     AMSWAPDB f o1 o2 o3 -> AMSWAPDB f (patchOp o1) (patchOp o2) (patchOp o3)

     -- 8. Barrier Instructions ---------------------------------------------------

     DBAR o1             -> DBAR o1

     IBAR o1             -> IBAR o1

   TAIL36 {} -> True

   BCOND1 {} -> True

   BCOND {} -> True

   BEQZ {} -> True

   BNEZ {} -> True

   _ -> False

     | TAIL36 Operand Target

     | BCOND1 Cond Operand Operand Target

     | BCOND Cond Operand Operand Target

     | BEQZ Operand Target

     | BNEZ Operand Target

     -- 5. Common Memory Access Instructions --------------------------------------

     -- 6. Bound Check Memory Access Instructions ---------------------------------

     -- 7. Atomic Memory Access Instructions --------------------------------------

     | AMSWAPDB Format Operand Operand Operand

     -- 8. Barrier Instructions ---------------------------------------------------

     | DBAR BarrierType

     | IBAR BarrierType

       TAIL36{} -> "TAIL36"

       BCOND1{} -> "BCOND1"

       BCOND{} -> "BCOND"

       BEQZ{} -> "BEQZ"

       BNEZ{} -> "BNEZ"

       LD{} -> "LD"

       STPTR{} -> "STPTR"

       PRELD{} -> "PRELD"

       AMSWAPDB{} -> "AMSWAPDB"

       DBAR{} -> "DBAR"

       IBAR{} -> "IBAR"

       FCVT{} -> "FCVT"

       line $ text "\tbgeu" <+> pprOp platform d <> comma <+> pprOp platform j <> comma <+> pprAsmLabel platform (mkLocalBlockLabel (getUnique bid))

     UGT ->

       line $ text "\tbltu" <+> pprOp platform d <> comma <+> pprOp platform j <> comma <+> pprAsmLabel platform (mkLocalBlockLabel (getUnique bid))

     _ -> line $ text "\t" <> pprBcond c <+> pprOp platform j <> comma <+> pprOp platform d <> comma <+> pprAsmLabel platform (mkLocalBlockLabel (getUnique bid))

   BCOND1 _ _ _ (TLabel _) -> panic "LA64.ppr: BCOND1: No conditional branching to TLabel!"

   BCOND _ _ _ (TReg _) -> panic "LA64.ppr: BCOND: No conditional branching to registers!"

   BEQZ j (TBlock bid) ->

     line $ text "\tbeqz" <+> pprOp platform j <> comma <+> pprAsmLabel platform (mkLocalBlockLabel (getUnique bid))

   BEQZ j (TLabel lbl) ->

     line $ text "\tbeqz" <+> pprOp platform j <> comma <+> pprAsmLabel platform lbl

   BNEZ j (TBlock bid) ->

     line $ text "\tbnez" <+> pprOp platform j <> comma <+> pprAsmLabel platform (mkLocalBlockLabel (getUnique bid))

   BNEZ j (TLabel lbl) ->

     line $ text "\tbnez" <+> pprOp platform j <> comma <+> pprAsmLabel platform lbl

   -- 5. Common Memory Access Instructions --------------------------------------

     -- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}: AddrRegImm

   AMSWAPDB II32 o1 o2 o3 -> op3 (text "\tamswap_db.w") o1 o2 o3

   AMSWAPDB II64 o1 o2 o3 -> op3 (text "\tamswap_db.d") o1 o2 o3

     -- AM.{SWAP/ADD}[_DB].{B/H}

     -- AMCAS[_DB].{B/H/W/D}

     -- LL.{W/D}, SC.{W/D}

     -- SC.Q

     -- LL.ACQ.{W/D}, SC.REL.{W/D}

   -- 8. Barrier Instructions ---------------------------------------------------