Marge Bot pushed to branch master at Glasgow Haskell Compiler / GHC
Commits:
-
6ef22fa0
by IC Rainbow at 2025-10-26T18:23:01-04:00
26 changed files:
- compiler/GHC/Builtin/primops.txt.pp
- compiler/GHC/Cmm/MachOp.hs
- compiler/GHC/CmmToAsm/AArch64/CodeGen.hs
- compiler/GHC/CmmToAsm/X86/CodeGen.hs
- compiler/GHC/CmmToAsm/X86/Instr.hs
- compiler/GHC/CmmToAsm/X86/Ppr.hs
- compiler/GHC/CmmToC.hs
- compiler/GHC/CmmToLlvm/CodeGen.hs
- compiler/GHC/StgToCmm/Prim.hs
- compiler/GHC/StgToJS/Prim.hs
- docs/users_guide/9.16.1-notes.rst
- libraries/base/src/GHC/Base.hs
- libraries/base/src/GHC/Exts.hs
- libraries/ghc-experimental/CHANGELOG.md
- libraries/ghc-prim/changelog.md
- testsuite/tests/interface-stability/ghc-experimental-exports.stdout
- testsuite/tests/interface-stability/ghc-experimental-exports.stdout-mingw32
- testsuite/tests/interface-stability/ghc-prim-exports.stdout
- testsuite/tests/interface-stability/ghc-prim-exports.stdout-mingw32
- testsuite/tests/simd/should_run/all.T
- + testsuite/tests/simd/should_run/simd015.hs
- + testsuite/tests/simd/should_run/simd015.stdout
- + testsuite/tests/simd/should_run/simd016.hs
- + testsuite/tests/simd/should_run/simd016.stdout
- + testsuite/tests/simd/should_run/simd017.hs
- + testsuite/tests/simd/should_run/simd017.stdout
Changes:
| ... | ... | @@ -4391,6 +4391,24 @@ primop VecMaxOp "max#" GenPrimOp |
| 4391 | 4391 | with
|
| 4392 | 4392 | vector = ALL_VECTOR_TYPES
|
| 4393 | 4393 | |
| 4394 | +primop VecAndOp "and#" GenPrimOp
|
|
| 4395 | + VECTOR -> VECTOR -> VECTOR
|
|
| 4396 | + {Bit-wise AND of two vectors.}
|
|
| 4397 | + with
|
|
| 4398 | + vector = ALL_VECTOR_TYPES
|
|
| 4399 | + |
|
| 4400 | +primop VecOrOp "or#" GenPrimOp
|
|
| 4401 | + VECTOR -> VECTOR -> VECTOR
|
|
| 4402 | + {Bit-wise OR of two vectors.}
|
|
| 4403 | + with
|
|
| 4404 | + vector = ALL_VECTOR_TYPES
|
|
| 4405 | + |
|
| 4406 | +primop VecXorOp "xor#" GenPrimOp
|
|
| 4407 | + VECTOR -> VECTOR -> VECTOR
|
|
| 4408 | + {Bit-wise XOR of two vectors.}
|
|
| 4409 | + with
|
|
| 4410 | + vector = ALL_VECTOR_TYPES
|
|
| 4411 | + |
|
| 4394 | 4412 | ------------------------------------------------------------------------
|
| 4395 | 4413 | |
| 4396 | 4414 | section "Prefetch"
|
| ... | ... | @@ -196,6 +196,14 @@ data MachOp |
| 196 | 196 | | MO_VF_Min Length Width
|
| 197 | 197 | | MO_VF_Max Length Width
|
| 198 | 198 | |
| 199 | + -- Bitwise vector operations
|
|
| 200 | + | MO_V_And Length Width
|
|
| 201 | + | MO_V_Or Length Width
|
|
| 202 | + | MO_V_Xor Length Width
|
|
| 203 | + | MO_VF_And Length Width
|
|
| 204 | + | MO_VF_Or Length Width
|
|
| 205 | + | MO_VF_Xor Length Width
|
|
| 206 | + |
|
| 199 | 207 | -- | An atomic read with no memory ordering. Address msut
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| 200 | 208 | -- be naturally aligned.
|
| 201 | 209 | | MO_RelaxedRead Width
|
| ... | ... | @@ -507,6 +515,14 @@ machOpResultType platform mop tys = |
| 507 | 515 | MO_V_Sub l w -> cmmVec l (cmmBits w)
|
| 508 | 516 | MO_V_Mul l w -> cmmVec l (cmmBits w)
|
| 509 | 517 | |
| 518 | + MO_V_And l w -> cmmVec l (cmmBits w)
|
|
| 519 | + MO_V_Or l w -> cmmVec l (cmmBits w)
|
|
| 520 | + MO_V_Xor l w -> cmmVec l (cmmBits w)
|
|
| 521 | + |
|
| 522 | + MO_VF_And l w -> cmmVec l (cmmBits w)
|
|
| 523 | + MO_VF_Or l w -> cmmVec l (cmmBits w)
|
|
| 524 | + MO_VF_Xor l w -> cmmVec l (cmmBits w)
|
|
| 525 | + |
|
| 510 | 526 | MO_VS_Neg l w -> cmmVec l (cmmBits w)
|
| 511 | 527 | MO_VS_Min l w -> cmmVec l (cmmBits w)
|
| 512 | 528 | MO_VS_Max l w -> cmmVec l (cmmBits w)
|
| ... | ... | @@ -636,6 +652,13 @@ machOpArgReps platform op = |
| 636 | 652 | MO_VF_Min l w -> [vecwidth l w, vecwidth l w]
|
| 637 | 653 | MO_VF_Max l w -> [vecwidth l w, vecwidth l w]
|
| 638 | 654 | |
| 655 | + MO_V_And l w -> [vecwidth l w, vecwidth l w]
|
|
| 656 | + MO_V_Or l w -> [vecwidth l w, vecwidth l w]
|
|
| 657 | + MO_V_Xor l w -> [vecwidth l w, vecwidth l w]
|
|
| 658 | + MO_VF_And l w -> [vecwidth l w, vecwidth l w]
|
|
| 659 | + MO_VF_Or l w -> [vecwidth l w, vecwidth l w]
|
|
| 660 | + MO_VF_Xor l w -> [vecwidth l w, vecwidth l w]
|
|
| 661 | + |
|
| 639 | 662 | MO_RelaxedRead _ -> [wordWidth platform]
|
| 640 | 663 | MO_AlignmentCheck _ w -> [w]
|
| 641 | 664 | where
|
| ... | ... | @@ -832,6 +832,9 @@ getRegister' config plat expr |
| 832 | 832 | MO_V_Add {} -> notUnary
|
| 833 | 833 | MO_V_Sub {} -> notUnary
|
| 834 | 834 | MO_V_Mul {} -> notUnary
|
| 835 | + MO_V_And {} -> notUnary
|
|
| 836 | + MO_V_Or {} -> notUnary
|
|
| 837 | + MO_V_Xor {} -> notUnary
|
|
| 835 | 838 | MO_VS_Neg {} -> notUnary
|
| 836 | 839 | MO_V_Shuffle {} -> notUnary
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| 837 | 840 | MO_VF_Shuffle {} -> notUnary
|
| ... | ... | @@ -841,6 +844,9 @@ getRegister' config plat expr |
| 841 | 844 | MO_VF_Sub {} -> notUnary
|
| 842 | 845 | MO_VF_Mul {} -> notUnary
|
| 843 | 846 | MO_VF_Quot {} -> notUnary
|
| 847 | + MO_VF_And {} -> notUnary
|
|
| 848 | + MO_VF_Or {} -> notUnary
|
|
| 849 | + MO_VF_Xor {} -> notUnary
|
|
| 844 | 850 | MO_Add {} -> notUnary
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| 845 | 851 | MO_Sub {} -> notUnary
|
| 846 | 852 | |
| ... | ... | @@ -1221,6 +1227,12 @@ getRegister' config plat expr |
| 1221 | 1227 | MO_V_Add {} -> vectorsNeedLlvm
|
| 1222 | 1228 | MO_V_Sub {} -> vectorsNeedLlvm
|
| 1223 | 1229 | MO_V_Mul {} -> vectorsNeedLlvm
|
| 1230 | + MO_V_And {} -> vectorsNeedLlvm
|
|
| 1231 | + MO_V_Or {} -> vectorsNeedLlvm
|
|
| 1232 | + MO_V_Xor {} -> vectorsNeedLlvm
|
|
| 1233 | + MO_VF_And {} -> vectorsNeedLlvm
|
|
| 1234 | + MO_VF_Or {} -> vectorsNeedLlvm
|
|
| 1235 | + MO_VF_Xor {} -> vectorsNeedLlvm
|
|
| 1224 | 1236 | MO_VS_Neg {} -> vectorsNeedLlvm
|
| 1225 | 1237 | MO_VF_Extract {} -> vectorsNeedLlvm
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| 1226 | 1238 | MO_VF_Add {} -> vectorsNeedLlvm
|
| ... | ... | @@ -1137,6 +1137,13 @@ getRegister' platform is32Bit (CmmMachOp mop [x]) = do -- unary MachOps |
| 1137 | 1137 | MO_VF_Min {} -> incorrectOperands
|
| 1138 | 1138 | MO_VF_Max {} -> incorrectOperands
|
| 1139 | 1139 | |
| 1140 | + MO_V_And {} -> incorrectOperands
|
|
| 1141 | + MO_V_Or {} -> incorrectOperands
|
|
| 1142 | + MO_V_Xor {} -> incorrectOperands
|
|
| 1143 | + MO_VF_And {} -> incorrectOperands
|
|
| 1144 | + MO_VF_Or {} -> incorrectOperands
|
|
| 1145 | + MO_VF_Xor {} -> incorrectOperands
|
|
| 1146 | + |
|
| 1140 | 1147 | MO_VF_Extract {} -> incorrectOperands
|
| 1141 | 1148 | MO_VF_Add {} -> incorrectOperands
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| 1142 | 1149 | MO_VF_Sub {} -> incorrectOperands
|
| ... | ... | @@ -1404,6 +1411,20 @@ getRegister' platform is32Bit (CmmMachOp mop [x, y]) = do -- dyadic MachOps |
| 1404 | 1411 | MO_VF_Max l w | avx -> vector_float_op_avx (VMINMAX Max FloatMinMax) l w x y
|
| 1405 | 1412 | | otherwise -> vector_float_op_sse (MINMAX Max FloatMinMax) l w x y
|
| 1406 | 1413 | |
| 1414 | + MO_V_And l w | avx -> vector_int_op_avx VPAND l w x y
|
|
| 1415 | + | otherwise -> vector_int_op_sse PAND l w x y
|
|
| 1416 | + MO_V_Or l w | avx -> vector_int_op_avx VPOR l w x y
|
|
| 1417 | + | otherwise -> vector_int_op_sse POR l w x y
|
|
| 1418 | + MO_V_Xor l w | avx -> vector_int_op_avx VPXOR l w x y
|
|
| 1419 | + | otherwise -> vector_int_op_sse PXOR l w x y
|
|
| 1420 | + |
|
| 1421 | + MO_VF_And l w | avx -> vector_float_op_avx VAND l w x y
|
|
| 1422 | + | otherwise -> vector_float_op_sse (\fmt op2 -> AND fmt op2 . OpReg) l w x y
|
|
| 1423 | + MO_VF_Or l w | avx -> vector_float_op_avx VOR l w x y
|
|
| 1424 | + | otherwise -> vector_float_op_sse (\fmt op2 -> OR fmt op2 . OpReg) l w x y
|
|
| 1425 | + MO_VF_Xor l w | avx -> vector_float_op_avx VXOR l w x y
|
|
| 1426 | + | otherwise -> vector_float_op_sse (\fmt op2 -> XOR fmt op2 . OpReg) l w x y
|
|
| 1427 | + |
|
| 1407 | 1428 | -- SIMD NCG TODO: 256/512-bit integer vector operations
|
| 1408 | 1429 | MO_V_Shuffle 16 W8 is | not is32Bit -> vector_shuffle_int8x16 sse4_1 x y is
|
| 1409 | 1430 | MO_V_Shuffle 8 W16 is -> vector_shuffle_int16x8 sse4_1 x y is
|
| ... | ... | @@ -1680,6 +1701,21 @@ getRegister' platform is32Bit (CmmMachOp mop [x, y]) = do -- dyadic MachOps |
| 1680 | 1701 | |
| 1681 | 1702 | -----------------------
|
| 1682 | 1703 | -- Vector operations---
|
| 1704 | + vector_int_op_avx :: (Format -> Operand -> Reg -> Reg -> Instr)
|
|
| 1705 | + -> Length
|
|
| 1706 | + -> Width
|
|
| 1707 | + -> CmmExpr
|
|
| 1708 | + -> CmmExpr
|
|
| 1709 | + -> NatM Register
|
|
| 1710 | + vector_int_op_avx instr l w = vector_op_avx_reg (\fmt -> instr fmt . OpReg) format
|
|
| 1711 | + where format = case w of
|
|
| 1712 | + W8 -> VecFormat l FmtInt8
|
|
| 1713 | + W16 -> VecFormat l FmtInt16
|
|
| 1714 | + W32 -> VecFormat l FmtInt32
|
|
| 1715 | + W64 -> VecFormat l FmtInt64
|
|
| 1716 | + _ -> pprPanic "Integer AVX vector operation not supported at this width"
|
|
| 1717 | + (text "width:" <+> ppr w)
|
|
| 1718 | + |
|
| 1683 | 1719 | vector_float_op_avx :: (Format -> Operand -> Reg -> Reg -> Instr)
|
| 1684 | 1720 | -> Length
|
| 1685 | 1721 | -> Width
|
| ... | ... | @@ -3157,7 +3193,7 @@ getRegister' platform is32Bit (CmmLit lit) = do |
| 3157 | 3193 | | avx
|
| 3158 | 3194 | = if float_or_floatvec
|
| 3159 | 3195 | then unitOL (VXOR fmt (OpReg dst) dst dst)
|
| 3160 | - else unitOL (VPXOR fmt dst dst dst)
|
|
| 3196 | + else unitOL (VPXOR fmt (OpReg dst) dst dst)
|
|
| 3161 | 3197 | | otherwise
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| 3162 | 3198 | = if float_or_floatvec
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| 3163 | 3199 | then unitOL (XOR fmt (OpReg dst) (OpReg dst))
|
| ... | ... | @@ -175,11 +175,13 @@ data Instr |
| 175 | 175 | | AND Format Operand Operand
|
| 176 | 176 | | OR Format Operand Operand
|
| 177 | 177 | | XOR Format Operand Operand
|
| 178 | - -- | AVX bitwise logical XOR operation
|
|
| 179 | - | VXOR Format Operand Reg Reg
|
|
| 180 | 178 | | NOT Format Operand
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| 181 | 179 | | NEGI Format Operand -- NEG instruction (name clash with Cond)
|
| 182 | 180 | | BSWAP Format Reg
|
| 181 | + -- Vector bitwise logical operations
|
|
| 182 | + | VAND Format Operand Reg Reg
|
|
| 183 | + | VOR Format Operand Reg Reg
|
|
| 184 | + | VXOR Format Operand Reg Reg
|
|
| 183 | 185 | |
| 184 | 186 | -- Shifts (amount may be immediate or %cl only)
|
| 185 | 187 | | SHL Format Operand{-amount-} Operand
|
| ... | ... | @@ -318,10 +320,12 @@ data Instr |
| 318 | 320 | |
| 319 | 321 | -- logic operations
|
| 320 | 322 | | PXOR Format Operand Reg
|
| 321 | - | VPXOR Format Reg Reg Reg
|
|
| 323 | + | VPXOR Format Operand Reg Reg
|
|
| 322 | 324 | | PAND Format Operand Reg
|
| 323 | 325 | | PANDN Format Operand Reg
|
| 326 | + | VPAND Format Operand Reg Reg
|
|
| 324 | 327 | | POR Format Operand Reg
|
| 328 | + | VPOR Format Operand Reg Reg
|
|
| 325 | 329 | |
| 326 | 330 | -- Arithmetic
|
| 327 | 331 | | VADD Format Operand Reg Reg
|
| ... | ... | @@ -444,8 +448,14 @@ regUsageOfInstr platform instr |
| 444 | 448 | IDIV fmt op -> mkRU (mk fmt eax:mk fmt edx:use_R fmt op []) [mk fmt eax, mk fmt edx]
|
| 445 | 449 | ADD_CC fmt src dst -> usageRM fmt src dst
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| 446 | 450 | SUB_CC fmt src dst -> usageRM fmt src dst
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| 451 | + |
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| 447 | 452 | AND fmt src dst -> usageRM fmt src dst
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| 453 | + VAND fmt src1 src2 dst
|
|
| 454 | + -> mkRU (use_R fmt src1 [mk fmt src2]) [mk fmt dst]
|
|
| 455 | + |
|
| 448 | 456 | OR fmt src dst -> usageRM fmt src dst
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| 457 | + VOR fmt src1 src2 dst
|
|
| 458 | + -> mkRU (use_R fmt src1 [mk fmt src2]) [mk fmt dst]
|
|
| 449 | 459 | |
| 450 | 460 | XOR fmt (OpReg src) (OpReg dst)
|
| 451 | 461 | | src == dst
|
| ... | ... | @@ -500,6 +510,8 @@ regUsageOfInstr platform instr |
| 500 | 510 | LOCATION{} -> noUsage
|
| 501 | 511 | UNWIND{} -> noUsage
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| 502 | 512 | DELTA _ -> noUsage
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| 513 | + LDATA{} -> noUsage
|
|
| 514 | + NEWBLOCK{} -> noUsage
|
|
| 503 | 515 | |
| 504 | 516 | POPCNT fmt src dst -> mkRU (use_R fmt src []) [mk fmt dst]
|
| 505 | 517 | LZCNT fmt src dst -> mkRU (use_R fmt src []) [mk fmt dst]
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| ... | ... | @@ -525,7 +537,7 @@ regUsageOfInstr platform instr |
| 525 | 537 | VPBROADCAST sFmt vFmt src dst -> mkRU (use_R sFmt src []) [mk vFmt dst]
|
| 526 | 538 | VEXTRACT fmt _off src dst -> usageRW fmt (OpReg src) dst
|
| 527 | 539 | INSERTPS fmt (ImmInt off) src dst
|
| 528 | - -> mkRU ((use_R fmt src []) ++ [mk fmt dst | not doesNotReadDst]) [mk fmt dst]
|
|
| 540 | + -> mkRU (use_R fmt src [mk fmt dst | not doesNotReadDst]) [mk fmt dst]
|
|
| 529 | 541 | where
|
| 530 | 542 | -- Compute whether the instruction reads the destination register or not.
|
| 531 | 543 | -- Immediate bits: ss_dd_zzzz s = src pos, d = dst pos, z = zeroed components.
|
| ... | ... | @@ -534,7 +546,7 @@ regUsageOfInstr platform instr |
| 534 | 546 | -- are being zeroed.
|
| 535 | 547 | where pos = ( off `shiftR` 4 ) .&. 0b11
|
| 536 | 548 | INSERTPS fmt _off src dst
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| 537 | - -> mkRU ((use_R fmt src []) ++ [mk fmt dst]) [mk fmt dst]
|
|
| 549 | + -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
|
| 538 | 550 | VINSERTPS fmt _imm src2 src1 dst
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| 539 | 551 | -> mkRU (use_R fmt src2 [mk fmt src1]) [mk fmt dst]
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| 540 | 552 | PINSR sFmt vFmt _off src dst
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| ... | ... | @@ -550,26 +562,30 @@ regUsageOfInstr platform instr |
| 550 | 562 | VMOVDQU fmt src dst -> usageRW fmt src dst
|
| 551 | 563 | VMOV_MERGE fmt src2 src1 dst -> mkRU [mk fmt src1, mk fmt src2] [mk fmt dst]
|
| 552 | 564 | |
| 553 | - PXOR fmt (OpReg src) dst
|
|
| 554 | - | src == dst
|
|
| 565 | + PXOR fmt src dst
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|
| 566 | + | OpReg src_reg <- src
|
|
| 567 | + , src_reg == dst
|
|
| 555 | 568 | -> mkRU [] [mk fmt dst]
|
| 556 | 569 | | otherwise
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| 557 | - -> mkRU [mk fmt src, mk fmt dst] [mk fmt dst]
|
|
| 570 | + -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
|
| 558 | 571 | |
| 559 | 572 | VPXOR fmt s1 s2 dst
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| 560 | - | s1 == s2, s1 == dst
|
|
| 573 | + | OpReg s1_reg <- s1
|
|
| 574 | + , s1_reg == s2, s1_reg == dst
|
|
| 561 | 575 | -> mkRU [] [mk fmt dst]
|
| 562 | 576 | | otherwise
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| 563 | - -> mkRU [mk fmt s1, mk fmt s2] [mk fmt dst]
|
|
| 577 | + -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 564 | 578 | |
| 565 | 579 | PAND fmt src dst -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| 566 | 580 | PANDN fmt src dst -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| 581 | + VPAND fmt s1 s2 dst -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 567 | 582 | POR fmt src dst -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| 583 | + VPOR fmt s1 s2 dst -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 568 | 584 | |
| 569 | - VADD fmt s1 s2 dst -> mkRU ((use_R fmt s1 []) ++ [mk fmt s2]) [mk fmt dst]
|
|
| 570 | - VSUB fmt s1 s2 dst -> mkRU ((use_R fmt s1 []) ++ [mk fmt s2]) [mk fmt dst]
|
|
| 571 | - VMUL fmt s1 s2 dst -> mkRU ((use_R fmt s1 []) ++ [mk fmt s2]) [mk fmt dst]
|
|
| 572 | - VDIV fmt s1 s2 dst -> mkRU ((use_R fmt s1 []) ++ [mk fmt s2]) [mk fmt dst]
|
|
| 585 | + VADD fmt s1 s2 dst -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 586 | + VSUB fmt s1 s2 dst -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 587 | + VMUL fmt s1 s2 dst -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 588 | + VDIV fmt s1 s2 dst -> mkRU (use_R fmt s1 [mk fmt s2]) [mk fmt dst]
|
|
| 573 | 589 | PADD fmt src dst -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| 574 | 590 | PSUB fmt src dst -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| 575 | 591 | PMULL fmt src dst -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| ... | ... | @@ -651,7 +667,6 @@ regUsageOfInstr platform instr |
| 651 | 667 | -> mkRU (use_R fmt src [mk fmt dst]) [mk fmt dst]
|
| 652 | 668 | VMINMAX _ _ fmt src1 src2 dst
|
| 653 | 669 | -> mkRU (use_R fmt src1 [mk fmt src2]) [mk fmt dst]
|
| 654 | - _other -> panic "regUsage: unrecognised instr"
|
|
| 655 | 670 | where
|
| 656 | 671 | |
| 657 | 672 | -- # Definitions
|
| ... | ... | @@ -779,6 +794,8 @@ patchRegsOfInstr platform instr env |
| 779 | 794 | AND fmt src dst -> patch2 (AND fmt) src dst
|
| 780 | 795 | OR fmt src dst -> patch2 (OR fmt) src dst
|
| 781 | 796 | XOR fmt src dst -> patch2 (XOR fmt) src dst
|
| 797 | + VAND fmt src1 src2 dst -> VAND fmt (patchOp src1) (env src2) (env dst)
|
|
| 798 | + VOR fmt src1 src2 dst -> VOR fmt (patchOp src1) (env src2) (env dst)
|
|
| 782 | 799 | VXOR fmt src1 src2 dst -> VXOR fmt (patchOp src1) (env src2) (env dst)
|
| 783 | 800 | NOT fmt op -> patch1 (NOT fmt) op
|
| 784 | 801 | BSWAP fmt reg -> BSWAP fmt (env reg)
|
| ... | ... | @@ -868,11 +885,13 @@ patchRegsOfInstr platform instr env |
| 868 | 885 | VMOVDQU fmt src dst -> VMOVDQU fmt (patchOp src) (patchOp dst)
|
| 869 | 886 | VMOV_MERGE fmt src2 src1 dst -> VMOV_MERGE fmt (env src2) (env src1) (env dst)
|
| 870 | 887 | |
| 871 | - PXOR fmt src dst -> PXOR fmt (patchOp src) (env dst)
|
|
| 872 | - VPXOR fmt s1 s2 dst -> VPXOR fmt (env s1) (env s2) (env dst)
|
|
| 873 | - PAND fmt src dst -> PAND fmt (patchOp src) (env dst)
|
|
| 888 | + PXOR fmt src dst -> PXOR fmt (patchOp src) (env dst)
|
|
| 889 | + VPXOR fmt s1 s2 dst -> VPXOR fmt (patchOp s1) (env s2) (env dst)
|
|
| 890 | + PAND fmt src dst -> PAND fmt (patchOp src) (env dst)
|
|
| 891 | + VPAND fmt s1 s2 dst -> VPAND fmt (patchOp s1) (env s2) (env dst)
|
|
| 874 | 892 | PANDN fmt src dst -> PANDN fmt (patchOp src) (env dst)
|
| 875 | - POR fmt src dst -> POR fmt (patchOp src) (env dst)
|
|
| 893 | + POR fmt src dst -> POR fmt (patchOp src) (env dst)
|
|
| 894 | + VPOR fmt s1 s2 dst -> VPOR fmt (patchOp s1) (env s2) (env dst)
|
|
| 876 | 895 | |
| 877 | 896 | VADD fmt s1 s2 dst -> VADD fmt (patchOp s1) (env s2) (env dst)
|
| 878 | 897 | VSUB fmt s1 s2 dst -> VSUB fmt (patchOp s1) (env s2) (env dst)
|
| ... | ... | @@ -737,9 +737,15 @@ pprInstr platform i = case i of |
| 737 | 737 | AND format src dst
|
| 738 | 738 | -> pprFormatOpOp (text "and") format src dst
|
| 739 | 739 | |
| 740 | + VAND format src1 src2 dst
|
|
| 741 | + -> pprFormatOpRegReg (text "vand") format src1 src2 dst
|
|
| 742 | + |
|
| 740 | 743 | OR format src dst
|
| 741 | 744 | -> pprFormatOpOp (text "or") format src dst
|
| 742 | 745 | |
| 746 | + VOR format src1 src2 dst
|
|
| 747 | + -> pprFormatOpRegReg (text "vor") format src1 src2 dst
|
|
| 748 | + |
|
| 743 | 749 | XOR FF32 src dst
|
| 744 | 750 | -> pprOpOp (text "xorps") FF32 src dst
|
| 745 | 751 | |
| ... | ... | @@ -753,7 +759,7 @@ pprInstr platform i = case i of |
| 753 | 759 | -> pprFormatOpOp (text "xor") format src dst
|
| 754 | 760 | |
| 755 | 761 | VXOR fmt src1 src2 dst
|
| 756 | - -> pprVxor fmt src1 src2 dst
|
|
| 762 | + -> pprVXor fmt src1 src2 dst
|
|
| 757 | 763 | |
| 758 | 764 | POPCNT format src dst
|
| 759 | 765 | -> pprOpOp (text "popcnt") format src (OpReg dst)
|
| ... | ... | @@ -1036,13 +1042,17 @@ pprInstr platform i = case i of |
| 1036 | 1042 | PXOR format src dst
|
| 1037 | 1043 | -> pprPXor (text "pxor") format src dst
|
| 1038 | 1044 | VPXOR format s1 s2 dst
|
| 1039 | - -> pprXor (text "vpxor") format s1 s2 dst
|
|
| 1045 | + -> pprVXor format s1 s2 dst
|
|
| 1040 | 1046 | PAND format src dst
|
| 1041 | 1047 | -> pprOpReg (text "pand") format src dst
|
| 1048 | + VPAND format s1 s2 dst
|
|
| 1049 | + -> pprOpRegReg (text "vpand") format s1 s2 dst
|
|
| 1042 | 1050 | PANDN format src dst
|
| 1043 | 1051 | -> pprOpReg (text "pandn") format src dst
|
| 1044 | 1052 | POR format src dst
|
| 1045 | 1053 | -> pprOpReg (text "por") format src dst
|
| 1054 | + VPOR format s1 s2 dst
|
|
| 1055 | + -> pprOpRegReg (text "vpor") format s1 s2 dst
|
|
| 1046 | 1056 | VEXTRACT format offset from to
|
| 1047 | 1057 | -> pprFormatImmRegOp (text "vextract") format offset from to
|
| 1048 | 1058 | INSERTPS format offset addr dst
|
| ... | ... | @@ -1299,6 +1309,16 @@ pprInstr platform i = case i of |
| 1299 | 1309 | pprReg platform (archWordFormat (target32Bit platform)) reg
|
| 1300 | 1310 | ]
|
| 1301 | 1311 | |
| 1312 | + pprOpRegReg :: Line doc -> Format -> Operand -> Reg -> Reg -> doc
|
|
| 1313 | + pprOpRegReg name format op1 reg2 reg3
|
|
| 1314 | + = line $ hcat [
|
|
| 1315 | + pprMnemonic_ name,
|
|
| 1316 | + pprOperand platform format op1,
|
|
| 1317 | + comma,
|
|
| 1318 | + pprReg platform (archWordFormat (target32Bit platform)) reg2,
|
|
| 1319 | + comma,
|
|
| 1320 | + pprReg platform (archWordFormat (target32Bit platform)) reg3
|
|
| 1321 | + ]
|
|
| 1302 | 1322 | |
| 1303 | 1323 | pprFormatOpReg :: Line doc -> Format -> Operand -> Reg -> doc
|
| 1304 | 1324 | pprFormatOpReg name format op1 reg2
|
| ... | ... | @@ -1397,17 +1417,6 @@ pprInstr platform i = case i of |
| 1397 | 1417 | pprReg platform vectorFormat dst
|
| 1398 | 1418 | ]
|
| 1399 | 1419 | |
| 1400 | - pprXor :: Line doc -> Format -> Reg -> Reg -> Reg -> doc
|
|
| 1401 | - pprXor name format reg1 reg2 reg3
|
|
| 1402 | - = line $ hcat [
|
|
| 1403 | - pprGenMnemonic name format,
|
|
| 1404 | - pprReg platform format reg1,
|
|
| 1405 | - comma,
|
|
| 1406 | - pprReg platform format reg2,
|
|
| 1407 | - comma,
|
|
| 1408 | - pprReg platform format reg3
|
|
| 1409 | - ]
|
|
| 1410 | - |
|
| 1411 | 1420 | pprPXor :: Line doc -> Format -> Operand -> Reg -> doc
|
| 1412 | 1421 | pprPXor name format src dst
|
| 1413 | 1422 | = line $ hcat [
|
| ... | ... | @@ -1417,8 +1426,8 @@ pprInstr platform i = case i of |
| 1417 | 1426 | pprReg platform format dst
|
| 1418 | 1427 | ]
|
| 1419 | 1428 | |
| 1420 | - pprVxor :: Format -> Operand -> Reg -> Reg -> doc
|
|
| 1421 | - pprVxor fmt src1 src2 dst
|
|
| 1429 | + pprVXor :: Format -> Operand -> Reg -> Reg -> doc
|
|
| 1430 | + pprVXor fmt src1 src2 dst
|
|
| 1422 | 1431 | = line $ hcat [
|
| 1423 | 1432 | pprGenMnemonic mem fmt,
|
| 1424 | 1433 | pprOperand platform fmt src1,
|
| ... | ... | @@ -1433,7 +1442,8 @@ pprInstr platform i = case i of |
| 1433 | 1442 | FF64 -> text "vxorpd"
|
| 1434 | 1443 | VecFormat _ FmtFloat -> text "vxorps"
|
| 1435 | 1444 | VecFormat _ FmtDouble -> text "vxorpd"
|
| 1436 | - _ -> pprPanic "GHC.CmmToAsm.X86.Ppr.pprVxor: element type must be Float or Double"
|
|
| 1445 | + VecFormat _ _ints -> text "vpxor"
|
|
| 1446 | + _ -> pprPanic "GHC.CmmToAsm.X86.Ppr.pprVXor: unexpected format"
|
|
| 1437 | 1447 | (ppr fmt)
|
| 1438 | 1448 | |
| 1439 | 1449 | pprInsert :: Line doc -> Format -> Imm -> Operand -> Reg -> doc
|
| ... | ... | @@ -873,6 +873,31 @@ pprMachOp_for_C platform mop = case mop of |
| 873 | 873 | (text "MO_V_Mul")
|
| 874 | 874 | (panic $ "PprC.pprMachOp_for_C: MO_V_Mul"
|
| 875 | 875 | ++ "unsupported by the unregisterised backend")
|
| 876 | + MO_V_And {} -> pprTrace "offending mop:"
|
|
| 877 | + (text "MO_V_And")
|
|
| 878 | + (panic $ "PprC.pprMachOp_for_C: MO_V_And"
|
|
| 879 | + ++ "unsupported by the unregisterised backend")
|
|
| 880 | + MO_V_Or {} -> pprTrace "offending mop:"
|
|
| 881 | + (text "MO_V_Or")
|
|
| 882 | + (panic $ "PprC.pprMachOp_for_C: MO_V_Or"
|
|
| 883 | + ++ "unsupported by the unregisterised backend")
|
|
| 884 | + MO_V_Xor {} -> pprTrace "offending mop:"
|
|
| 885 | + (text "MO_V_Xor")
|
|
| 886 | + (panic $ "PprC.pprMachOp_for_C: MO_V_Xor"
|
|
| 887 | + ++ "unsupported by the unregisterised backend")
|
|
| 888 | + MO_VF_And {} -> pprTrace "offending mop:"
|
|
| 889 | + (text "MO_VF_And")
|
|
| 890 | + (panic $ "PprC.pprMachOp_for_C: MO_VF_And"
|
|
| 891 | + ++ "unsupported by the unregisterised backend")
|
|
| 892 | + MO_VF_Or {} -> pprTrace "offending mop:"
|
|
| 893 | + (text "MO_VF_Or")
|
|
| 894 | + (panic $ "PprC.pprMachOp_for_C: MO_VF_Or"
|
|
| 895 | + ++ "unsupported by the unregisterised backend")
|
|
| 896 | + MO_VF_Xor {} -> pprTrace "offending mop:"
|
|
| 897 | + (text "MO_VF_Xor")
|
|
| 898 | + (panic $ "PprC.pprMachOp_for_C: MO_VF_Xor"
|
|
| 899 | + ++ "unsupported by the unregisterised backend")
|
|
| 900 | + |
|
| 876 | 901 | MO_VS_Neg {} -> pprTrace "offending mop:"
|
| 877 | 902 | (text "MO_VS_Neg")
|
| 878 | 903 | (panic $ "PprC.pprMachOp_for_C: MO_VS_Neg"
|
| ... | ... | @@ -1593,6 +1593,14 @@ genMachOp _ op [x] = case op of |
| 1593 | 1593 | MO_VF_Min _ _ -> panicOp
|
| 1594 | 1594 | MO_VF_Max _ _ -> panicOp
|
| 1595 | 1595 | |
| 1596 | + MO_V_And {} -> panicOp
|
|
| 1597 | + MO_V_Or {} -> panicOp
|
|
| 1598 | + MO_V_Xor {} -> panicOp
|
|
| 1599 | + |
|
| 1600 | + MO_VF_And {} -> panicOp
|
|
| 1601 | + MO_VF_Or {} -> panicOp
|
|
| 1602 | + MO_VF_Xor {} -> panicOp
|
|
| 1603 | + |
|
| 1596 | 1604 | where
|
| 1597 | 1605 | negate ty v2 negOp = do
|
| 1598 | 1606 | (vx, stmts, top) <- exprToVar x
|
| ... | ... | @@ -1754,11 +1762,19 @@ genMachOp_slow opt op [x, y] = case op of |
| 1754 | 1762 | MO_V_Sub l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_Sub
|
| 1755 | 1763 | MO_V_Mul l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_Mul
|
| 1756 | 1764 | |
| 1765 | + MO_V_And l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_And
|
|
| 1766 | + MO_V_Or l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_Or
|
|
| 1767 | + MO_V_Xor l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_Xor
|
|
| 1768 | + |
|
| 1757 | 1769 | MO_VF_Add l w -> genCastBinMach (LMVector l (widthToLlvmFloat w)) LM_MO_FAdd
|
| 1758 | 1770 | MO_VF_Sub l w -> genCastBinMach (LMVector l (widthToLlvmFloat w)) LM_MO_FSub
|
| 1759 | 1771 | MO_VF_Mul l w -> genCastBinMach (LMVector l (widthToLlvmFloat w)) LM_MO_FMul
|
| 1760 | 1772 | MO_VF_Quot l w -> genCastBinMach (LMVector l (widthToLlvmFloat w)) LM_MO_FDiv
|
| 1761 | 1773 | |
| 1774 | + MO_VF_And l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_And
|
|
| 1775 | + MO_VF_Or l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_Or
|
|
| 1776 | + MO_VF_Xor l w -> genCastBinMach (LMVector l (widthToLlvmInt w)) LM_MO_Xor
|
|
| 1777 | + |
|
| 1762 | 1778 | MO_Not _ -> panicOp
|
| 1763 | 1779 | MO_S_Neg _ -> panicOp
|
| 1764 | 1780 | MO_F_Neg _ -> panicOp
|
| ... | ... | @@ -1558,6 +1558,16 @@ emitPrimOp cfg primop = |
| 1558 | 1558 | | not allowIntWord64X2MinMax -> opCallish MO_W64X2_Max
|
| 1559 | 1559 | (VecMaxOp WordVec n w) -> opTranslate (MO_VU_Max n w)
|
| 1560 | 1560 | |
| 1561 | + -- Vector bitwise instructions
|
|
| 1562 | + -- On floats, ANDPS-like
|
|
| 1563 | + (VecAndOp FloatVec n w) -> opTranslate (MO_VF_And n w)
|
|
| 1564 | + (VecOrOp FloatVec n w) -> opTranslate (MO_VF_Or n w)
|
|
| 1565 | + (VecXorOp FloatVec n w) -> opTranslate (MO_VF_Xor n w)
|
|
| 1566 | + -- On integer, PAND-like
|
|
| 1567 | + (VecAndOp _ n w) -> opTranslate (MO_V_And n w)
|
|
| 1568 | + (VecOrOp _ n w) -> opTranslate (MO_V_Or n w)
|
|
| 1569 | + (VecXorOp _ n w) -> opTranslate (MO_V_Xor n w)
|
|
| 1570 | + |
|
| 1561 | 1571 | -- Vector FMA instructions
|
| 1562 | 1572 | VecFMAdd _ n w -> fmaOp FMAdd n w
|
| 1563 | 1573 | VecFMSub _ n w -> fmaOp FMSub n w
|
| ... | ... | @@ -1211,6 +1211,9 @@ genPrim prof bound ty op = case op of |
| 1211 | 1211 | VecShuffleOp _ _ _ -> unhandledPrimop op
|
| 1212 | 1212 | VecMinOp {} -> unhandledPrimop op
|
| 1213 | 1213 | VecMaxOp {} -> unhandledPrimop op
|
| 1214 | + VecAndOp {} -> unhandledPrimop op
|
|
| 1215 | + VecOrOp {} -> unhandledPrimop op
|
|
| 1216 | + VecXorOp {} -> unhandledPrimop op
|
|
| 1214 | 1217 | |
| 1215 | 1218 | PrefetchByteArrayOp3 -> noOp
|
| 1216 | 1219 | PrefetchMutableByteArrayOp3 -> noOp
|
| ... | ... | @@ -85,6 +85,8 @@ Cmm |
| 85 | 85 | ``ghc-experimental`` library
|
| 86 | 86 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
| 87 | 87 | |
| 88 | +- New SIMD primops for bitwise logical operations on 128-wide vectors.
|
|
| 89 | + |
|
| 88 | 90 | ``template-haskell`` library
|
| 89 | 91 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
| 90 | 92 |
| ... | ... | @@ -270,6 +270,97 @@ import GHC.Prim hiding |
| 270 | 270 | , minWord8X16#
|
| 271 | 271 | , minWord8X32#
|
| 272 | 272 | , minWord8X64#
|
| 273 | + -- Don't re-export vector logical primops
|
|
| 274 | + , andDoubleX2#
|
|
| 275 | + , andDoubleX4#
|
|
| 276 | + , andDoubleX8#
|
|
| 277 | + , andFloatX16#
|
|
| 278 | + , andFloatX4#
|
|
| 279 | + , andFloatX8#
|
|
| 280 | + , andInt16X16#
|
|
| 281 | + , andInt16X32#
|
|
| 282 | + , andInt16X8#
|
|
| 283 | + , andInt32X16#
|
|
| 284 | + , andInt32X4#
|
|
| 285 | + , andInt32X8#
|
|
| 286 | + , andInt64X2#
|
|
| 287 | + , andInt64X4#
|
|
| 288 | + , andInt64X8#
|
|
| 289 | + , andInt8X16#
|
|
| 290 | + , andInt8X32#
|
|
| 291 | + , andInt8X64#
|
|
| 292 | + , andWord16X16#
|
|
| 293 | + , andWord16X32#
|
|
| 294 | + , andWord16X8#
|
|
| 295 | + , andWord32X16#
|
|
| 296 | + , andWord32X4#
|
|
| 297 | + , andWord32X8#
|
|
| 298 | + , andWord64X2#
|
|
| 299 | + , andWord64X4#
|
|
| 300 | + , andWord64X8#
|
|
| 301 | + , andWord8X16#
|
|
| 302 | + , andWord8X32#
|
|
| 303 | + , andWord8X64#
|
|
| 304 | + , orDoubleX2#
|
|
| 305 | + , orDoubleX4#
|
|
| 306 | + , orDoubleX8#
|
|
| 307 | + , orFloatX16#
|
|
| 308 | + , orFloatX4#
|
|
| 309 | + , orFloatX8#
|
|
| 310 | + , orInt16X16#
|
|
| 311 | + , orInt16X32#
|
|
| 312 | + , orInt16X8#
|
|
| 313 | + , orInt32X16#
|
|
| 314 | + , orInt32X4#
|
|
| 315 | + , orInt32X8#
|
|
| 316 | + , orInt64X2#
|
|
| 317 | + , orInt64X4#
|
|
| 318 | + , orInt64X8#
|
|
| 319 | + , orInt8X16#
|
|
| 320 | + , orInt8X32#
|
|
| 321 | + , orInt8X64#
|
|
| 322 | + , orWord16X16#
|
|
| 323 | + , orWord16X32#
|
|
| 324 | + , orWord16X8#
|
|
| 325 | + , orWord32X16#
|
|
| 326 | + , orWord32X4#
|
|
| 327 | + , orWord32X8#
|
|
| 328 | + , orWord64X2#
|
|
| 329 | + , orWord64X4#
|
|
| 330 | + , orWord64X8#
|
|
| 331 | + , orWord8X16#
|
|
| 332 | + , orWord8X32#
|
|
| 333 | + , orWord8X64#
|
|
| 334 | + , xorDoubleX2#
|
|
| 335 | + , xorDoubleX4#
|
|
| 336 | + , xorDoubleX8#
|
|
| 337 | + , xorFloatX16#
|
|
| 338 | + , xorFloatX4#
|
|
| 339 | + , xorFloatX8#
|
|
| 340 | + , xorInt16X16#
|
|
| 341 | + , xorInt16X32#
|
|
| 342 | + , xorInt16X8#
|
|
| 343 | + , xorInt32X16#
|
|
| 344 | + , xorInt32X4#
|
|
| 345 | + , xorInt32X8#
|
|
| 346 | + , xorInt64X2#
|
|
| 347 | + , xorInt64X4#
|
|
| 348 | + , xorInt64X8#
|
|
| 349 | + , xorInt8X16#
|
|
| 350 | + , xorInt8X32#
|
|
| 351 | + , xorInt8X64#
|
|
| 352 | + , xorWord16X16#
|
|
| 353 | + , xorWord16X32#
|
|
| 354 | + , xorWord16X8#
|
|
| 355 | + , xorWord32X16#
|
|
| 356 | + , xorWord32X4#
|
|
| 357 | + , xorWord32X8#
|
|
| 358 | + , xorWord64X2#
|
|
| 359 | + , xorWord64X4#
|
|
| 360 | + , xorWord64X8#
|
|
| 361 | + , xorWord8X16#
|
|
| 362 | + , xorWord8X32#
|
|
| 363 | + , xorWord8X64#
|
|
| 273 | 364 | )
|
| 274 | 365 | |
| 275 | 366 | import GHC.Prim.Ext
|
| ... | ... | @@ -245,6 +245,97 @@ import GHC.Prim hiding |
| 245 | 245 | , minWord8X16#
|
| 246 | 246 | , minWord8X32#
|
| 247 | 247 | , minWord8X64#
|
| 248 | + -- Don't re-export vector logical primops
|
|
| 249 | + , andDoubleX2#
|
|
| 250 | + , andDoubleX4#
|
|
| 251 | + , andDoubleX8#
|
|
| 252 | + , andFloatX16#
|
|
| 253 | + , andFloatX4#
|
|
| 254 | + , andFloatX8#
|
|
| 255 | + , andInt16X16#
|
|
| 256 | + , andInt16X32#
|
|
| 257 | + , andInt16X8#
|
|
| 258 | + , andInt32X16#
|
|
| 259 | + , andInt32X4#
|
|
| 260 | + , andInt32X8#
|
|
| 261 | + , andInt64X2#
|
|
| 262 | + , andInt64X4#
|
|
| 263 | + , andInt64X8#
|
|
| 264 | + , andInt8X16#
|
|
| 265 | + , andInt8X32#
|
|
| 266 | + , andInt8X64#
|
|
| 267 | + , andWord16X16#
|
|
| 268 | + , andWord16X32#
|
|
| 269 | + , andWord16X8#
|
|
| 270 | + , andWord32X16#
|
|
| 271 | + , andWord32X4#
|
|
| 272 | + , andWord32X8#
|
|
| 273 | + , andWord64X2#
|
|
| 274 | + , andWord64X4#
|
|
| 275 | + , andWord64X8#
|
|
| 276 | + , andWord8X16#
|
|
| 277 | + , andWord8X32#
|
|
| 278 | + , andWord8X64#
|
|
| 279 | + , orDoubleX2#
|
|
| 280 | + , orDoubleX4#
|
|
| 281 | + , orDoubleX8#
|
|
| 282 | + , orFloatX16#
|
|
| 283 | + , orFloatX4#
|
|
| 284 | + , orFloatX8#
|
|
| 285 | + , orInt16X16#
|
|
| 286 | + , orInt16X32#
|
|
| 287 | + , orInt16X8#
|
|
| 288 | + , orInt32X16#
|
|
| 289 | + , orInt32X4#
|
|
| 290 | + , orInt32X8#
|
|
| 291 | + , orInt64X2#
|
|
| 292 | + , orInt64X4#
|
|
| 293 | + , orInt64X8#
|
|
| 294 | + , orInt8X16#
|
|
| 295 | + , orInt8X32#
|
|
| 296 | + , orInt8X64#
|
|
| 297 | + , orWord16X16#
|
|
| 298 | + , orWord16X32#
|
|
| 299 | + , orWord16X8#
|
|
| 300 | + , orWord32X16#
|
|
| 301 | + , orWord32X4#
|
|
| 302 | + , orWord32X8#
|
|
| 303 | + , orWord64X2#
|
|
| 304 | + , orWord64X4#
|
|
| 305 | + , orWord64X8#
|
|
| 306 | + , orWord8X16#
|
|
| 307 | + , orWord8X32#
|
|
| 308 | + , orWord8X64#
|
|
| 309 | + , xorDoubleX2#
|
|
| 310 | + , xorDoubleX4#
|
|
| 311 | + , xorDoubleX8#
|
|
| 312 | + , xorFloatX16#
|
|
| 313 | + , xorFloatX4#
|
|
| 314 | + , xorFloatX8#
|
|
| 315 | + , xorInt16X16#
|
|
| 316 | + , xorInt16X32#
|
|
| 317 | + , xorInt16X8#
|
|
| 318 | + , xorInt32X16#
|
|
| 319 | + , xorInt32X4#
|
|
| 320 | + , xorInt32X8#
|
|
| 321 | + , xorInt64X2#
|
|
| 322 | + , xorInt64X4#
|
|
| 323 | + , xorInt64X8#
|
|
| 324 | + , xorInt8X16#
|
|
| 325 | + , xorInt8X32#
|
|
| 326 | + , xorInt8X64#
|
|
| 327 | + , xorWord16X16#
|
|
| 328 | + , xorWord16X32#
|
|
| 329 | + , xorWord16X8#
|
|
| 330 | + , xorWord32X16#
|
|
| 331 | + , xorWord32X4#
|
|
| 332 | + , xorWord32X8#
|
|
| 333 | + , xorWord64X2#
|
|
| 334 | + , xorWord64X4#
|
|
| 335 | + , xorWord64X8#
|
|
| 336 | + , xorWord8X16#
|
|
| 337 | + , xorWord8X32#
|
|
| 338 | + , xorWord8X64#
|
|
| 248 | 339 | )
|
| 249 | 340 | |
| 250 | 341 | import GHC.Prim.Ext
|
| 1 | 1 | # Revision history for ghc-experimental
|
| 2 | 2 | |
| 3 | +## 9.1601.0
|
|
| 4 | + |
|
| 5 | +- New and/or/xor SIMD primops for bitwise logical operations, such as andDoubleX4#, orWord32X4#, xorInt8X16#, etc.
|
|
| 6 | + These are supported by the LLVM backend and by the X86_64 NCG backend (for the latter, only for 128-wide vectors).
|
|
| 7 | + |
|
| 3 | 8 | ## 0.1.0.0 -- YYYY-mm-dd
|
| 4 | 9 | |
| 5 | 10 | * First version. Released on an unsuspecting world. |
| 1 | +## 0.14.0
|
|
| 2 | + |
|
| 3 | +- Shipped with GHC 9.16.1
|
|
| 4 | + |
|
| 5 | +- New and/or/xor SIMD primops for bitwise logical operations, such as andDoubleX4#, orWord32X4#, xorInt8X16#, etc.
|
|
| 6 | + These are supported by the LLVM backend and by the X86_64 NCG backend (for the latter, only for 128-wide vectors).
|
|
| 7 | + |
|
| 1 | 8 | ## 0.13.1
|
| 2 | 9 | |
| 3 | 10 | - Shipped with GHC 9.14.1
|
| ... | ... | @@ -4747,10 +4747,40 @@ module GHC.PrimOps where |
| 4747 | 4747 | addrToAny# :: forall {l :: Levity} (a :: TYPE (BoxedRep l)). Addr# -> (# a #)
|
| 4748 | 4748 | and# :: Word# -> Word# -> Word#
|
| 4749 | 4749 | and64# :: Word64# -> Word64# -> Word64#
|
| 4750 | + andDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 4751 | + andDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 4752 | + andDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 4753 | + andFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 4754 | + andFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 4755 | + andFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 4750 | 4756 | andI# :: Int# -> Int# -> Int#
|
| 4757 | + andInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 4758 | + andInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 4759 | + andInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 4760 | + andInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 4761 | + andInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 4762 | + andInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 4763 | + andInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 4764 | + andInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 4765 | + andInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 4766 | + andInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 4767 | + andInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 4768 | + andInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 4751 | 4769 | andWord16# :: Word16# -> Word16# -> Word16#
|
| 4770 | + andWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 4771 | + andWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 4772 | + andWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 4752 | 4773 | andWord32# :: Word32# -> Word32# -> Word32#
|
| 4774 | + andWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 4775 | + andWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 4776 | + andWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 4777 | + andWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 4778 | + andWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 4779 | + andWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 4753 | 4780 | andWord8# :: Word8# -> Word8# -> Word8#
|
| 4781 | + andWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 4782 | + andWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 4783 | + andWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 4754 | 4784 | annotateStack# :: forall {q :: RuntimeRep} b d (a :: TYPE q). b -> (State# d -> (# State# d, a #)) -> State# d -> (# State# d, a #)
|
| 4755 | 4785 | anyToAddr# :: forall a. a -> State# RealWorld -> (# State# RealWorld, Addr# #)
|
| 4756 | 4786 | asinDouble# :: Double# -> Double#
|
| ... | ... | @@ -5458,10 +5488,40 @@ module GHC.PrimOps where |
| 5458 | 5488 | oneShot :: forall {q :: RuntimeRep} {r :: RuntimeRep} (a :: TYPE q) (b :: TYPE r). (a -> b) -> a -> b
|
| 5459 | 5489 | or# :: Word# -> Word# -> Word#
|
| 5460 | 5490 | or64# :: Word64# -> Word64# -> Word64#
|
| 5491 | + orDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 5492 | + orDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 5493 | + orDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 5494 | + orFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 5495 | + orFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 5496 | + orFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 5461 | 5497 | orI# :: Int# -> Int# -> Int#
|
| 5498 | + orInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 5499 | + orInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 5500 | + orInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 5501 | + orInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 5502 | + orInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 5503 | + orInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 5504 | + orInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 5505 | + orInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 5506 | + orInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 5507 | + orInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 5508 | + orInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 5509 | + orInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 5462 | 5510 | orWord16# :: Word16# -> Word16# -> Word16#
|
| 5511 | + orWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 5512 | + orWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 5513 | + orWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 5463 | 5514 | orWord32# :: Word32# -> Word32# -> Word32#
|
| 5515 | + orWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 5516 | + orWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 5517 | + orWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 5518 | + orWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 5519 | + orWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 5520 | + orWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 5464 | 5521 | orWord8# :: Word8# -> Word8# -> Word8#
|
| 5522 | + orWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 5523 | + orWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 5524 | + orWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 5465 | 5525 | ord# :: Char# -> Int#
|
| 5466 | 5526 | packDoubleX2# :: (# Double#, Double# #) -> DoubleX2#
|
| 5467 | 5527 | packDoubleX4# :: (# Double#, Double#, Double#, Double# #) -> DoubleX4#
|
| ... | ... | @@ -6271,10 +6331,40 @@ module GHC.PrimOps where |
| 6271 | 6331 | writeWordOffAddr# :: forall d. Addr# -> Int# -> Word# -> State# d -> State# d
|
| 6272 | 6332 | xor# :: Word# -> Word# -> Word#
|
| 6273 | 6333 | xor64# :: Word64# -> Word64# -> Word64#
|
| 6334 | + xorDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 6335 | + xorDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 6336 | + xorDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 6337 | + xorFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 6338 | + xorFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 6339 | + xorFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 6274 | 6340 | xorI# :: Int# -> Int# -> Int#
|
| 6341 | + xorInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 6342 | + xorInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 6343 | + xorInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 6344 | + xorInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 6345 | + xorInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 6346 | + xorInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 6347 | + xorInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 6348 | + xorInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 6349 | + xorInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 6350 | + xorInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 6351 | + xorInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 6352 | + xorInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 6275 | 6353 | xorWord16# :: Word16# -> Word16# -> Word16#
|
| 6354 | + xorWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 6355 | + xorWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 6356 | + xorWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 6276 | 6357 | xorWord32# :: Word32# -> Word32# -> Word32#
|
| 6358 | + xorWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 6359 | + xorWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 6360 | + xorWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 6361 | + xorWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 6362 | + xorWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 6363 | + xorWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 6277 | 6364 | xorWord8# :: Word8# -> Word8# -> Word8#
|
| 6365 | + xorWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 6366 | + xorWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 6367 | + xorWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 6278 | 6368 | yield# :: State# RealWorld -> State# RealWorld
|
| 6279 | 6369 | type (~) :: forall k. k -> k -> Constraint
|
| 6280 | 6370 | class (a ~ b) => (~) a b
|
| ... | ... | @@ -4747,10 +4747,40 @@ module GHC.PrimOps where |
| 4747 | 4747 | addrToAny# :: forall {l :: Levity} (a :: TYPE (BoxedRep l)). Addr# -> (# a #)
|
| 4748 | 4748 | and# :: Word# -> Word# -> Word#
|
| 4749 | 4749 | and64# :: Word64# -> Word64# -> Word64#
|
| 4750 | + andDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 4751 | + andDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 4752 | + andDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 4753 | + andFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 4754 | + andFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 4755 | + andFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 4750 | 4756 | andI# :: Int# -> Int# -> Int#
|
| 4757 | + andInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 4758 | + andInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 4759 | + andInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 4760 | + andInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 4761 | + andInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 4762 | + andInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 4763 | + andInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 4764 | + andInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 4765 | + andInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 4766 | + andInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 4767 | + andInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 4768 | + andInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 4751 | 4769 | andWord16# :: Word16# -> Word16# -> Word16#
|
| 4770 | + andWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 4771 | + andWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 4772 | + andWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 4752 | 4773 | andWord32# :: Word32# -> Word32# -> Word32#
|
| 4774 | + andWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 4775 | + andWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 4776 | + andWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 4777 | + andWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 4778 | + andWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 4779 | + andWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 4753 | 4780 | andWord8# :: Word8# -> Word8# -> Word8#
|
| 4781 | + andWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 4782 | + andWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 4783 | + andWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 4754 | 4784 | annotateStack# :: forall {q :: RuntimeRep} b d (a :: TYPE q). b -> (State# d -> (# State# d, a #)) -> State# d -> (# State# d, a #)
|
| 4755 | 4785 | anyToAddr# :: forall a. a -> State# RealWorld -> (# State# RealWorld, Addr# #)
|
| 4756 | 4786 | asinDouble# :: Double# -> Double#
|
| ... | ... | @@ -5461,10 +5491,40 @@ module GHC.PrimOps where |
| 5461 | 5491 | oneShot :: forall {q :: RuntimeRep} {r :: RuntimeRep} (a :: TYPE q) (b :: TYPE r). (a -> b) -> a -> b
|
| 5462 | 5492 | or# :: Word# -> Word# -> Word#
|
| 5463 | 5493 | or64# :: Word64# -> Word64# -> Word64#
|
| 5494 | + orDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 5495 | + orDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 5496 | + orDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 5497 | + orFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 5498 | + orFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 5499 | + orFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 5464 | 5500 | orI# :: Int# -> Int# -> Int#
|
| 5501 | + orInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 5502 | + orInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 5503 | + orInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 5504 | + orInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 5505 | + orInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 5506 | + orInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 5507 | + orInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 5508 | + orInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 5509 | + orInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 5510 | + orInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 5511 | + orInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 5512 | + orInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 5465 | 5513 | orWord16# :: Word16# -> Word16# -> Word16#
|
| 5514 | + orWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 5515 | + orWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 5516 | + orWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 5466 | 5517 | orWord32# :: Word32# -> Word32# -> Word32#
|
| 5518 | + orWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 5519 | + orWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 5520 | + orWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 5521 | + orWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 5522 | + orWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 5523 | + orWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 5467 | 5524 | orWord8# :: Word8# -> Word8# -> Word8#
|
| 5525 | + orWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 5526 | + orWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 5527 | + orWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 5468 | 5528 | ord# :: Char# -> Int#
|
| 5469 | 5529 | packDoubleX2# :: (# Double#, Double# #) -> DoubleX2#
|
| 5470 | 5530 | packDoubleX4# :: (# Double#, Double#, Double#, Double# #) -> DoubleX4#
|
| ... | ... | @@ -6274,10 +6334,40 @@ module GHC.PrimOps where |
| 6274 | 6334 | writeWordOffAddr# :: forall d. Addr# -> Int# -> Word# -> State# d -> State# d
|
| 6275 | 6335 | xor# :: Word# -> Word# -> Word#
|
| 6276 | 6336 | xor64# :: Word64# -> Word64# -> Word64#
|
| 6337 | + xorDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 6338 | + xorDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 6339 | + xorDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 6340 | + xorFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 6341 | + xorFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 6342 | + xorFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 6277 | 6343 | xorI# :: Int# -> Int# -> Int#
|
| 6344 | + xorInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 6345 | + xorInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 6346 | + xorInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 6347 | + xorInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 6348 | + xorInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 6349 | + xorInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 6350 | + xorInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 6351 | + xorInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 6352 | + xorInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 6353 | + xorInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 6354 | + xorInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 6355 | + xorInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 6278 | 6356 | xorWord16# :: Word16# -> Word16# -> Word16#
|
| 6357 | + xorWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 6358 | + xorWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 6359 | + xorWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 6279 | 6360 | xorWord32# :: Word32# -> Word32# -> Word32#
|
| 6361 | + xorWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 6362 | + xorWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 6363 | + xorWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 6364 | + xorWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 6365 | + xorWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 6366 | + xorWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 6280 | 6367 | xorWord8# :: Word8# -> Word8# -> Word8#
|
| 6368 | + xorWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 6369 | + xorWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 6370 | + xorWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 6281 | 6371 | yield# :: State# RealWorld -> State# RealWorld
|
| 6282 | 6372 | type (~) :: forall k. k -> k -> Constraint
|
| 6283 | 6373 | class (a ~ b) => (~) a b
|
| ... | ... | @@ -1423,10 +1423,40 @@ module GHC.Prim where |
| 1423 | 1423 | addrToAny# :: forall {l :: GHC.Internal.Types.Levity} (a :: TYPE (GHC.Internal.Types.BoxedRep l)). Addr# -> (# a #)
|
| 1424 | 1424 | and# :: Word# -> Word# -> Word#
|
| 1425 | 1425 | and64# :: Word64# -> Word64# -> Word64#
|
| 1426 | + andDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 1427 | + andDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 1428 | + andDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 1429 | + andFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 1430 | + andFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 1431 | + andFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 1426 | 1432 | andI# :: Int# -> Int# -> Int#
|
| 1433 | + andInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 1434 | + andInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 1435 | + andInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 1436 | + andInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 1437 | + andInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 1438 | + andInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 1439 | + andInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 1440 | + andInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 1441 | + andInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 1442 | + andInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 1443 | + andInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 1444 | + andInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 1427 | 1445 | andWord16# :: Word16# -> Word16# -> Word16#
|
| 1446 | + andWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 1447 | + andWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 1448 | + andWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 1428 | 1449 | andWord32# :: Word32# -> Word32# -> Word32#
|
| 1450 | + andWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 1451 | + andWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 1452 | + andWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 1453 | + andWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 1454 | + andWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 1455 | + andWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 1429 | 1456 | andWord8# :: Word8# -> Word8# -> Word8#
|
| 1457 | + andWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 1458 | + andWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 1459 | + andWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 1430 | 1460 | annotateStack# :: forall {q :: GHC.Internal.Types.RuntimeRep} b d (a :: TYPE q). b -> (State# d -> (# State# d, a #)) -> State# d -> (# State# d, a #)
|
| 1431 | 1461 | anyToAddr# :: forall a. a -> State# RealWorld -> (# State# RealWorld, Addr# #)
|
| 1432 | 1462 | asinDouble# :: Double# -> Double#
|
| ... | ... | @@ -2111,10 +2141,40 @@ module GHC.Prim where |
| 2111 | 2141 | numSparks# :: forall d. State# d -> (# State# d, Int# #)
|
| 2112 | 2142 | or# :: Word# -> Word# -> Word#
|
| 2113 | 2143 | or64# :: Word64# -> Word64# -> Word64#
|
| 2144 | + orDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 2145 | + orDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 2146 | + orDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 2147 | + orFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 2148 | + orFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 2149 | + orFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 2114 | 2150 | orI# :: Int# -> Int# -> Int#
|
| 2151 | + orInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 2152 | + orInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 2153 | + orInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 2154 | + orInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 2155 | + orInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 2156 | + orInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 2157 | + orInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 2158 | + orInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 2159 | + orInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 2160 | + orInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 2161 | + orInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 2162 | + orInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 2115 | 2163 | orWord16# :: Word16# -> Word16# -> Word16#
|
| 2164 | + orWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 2165 | + orWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 2166 | + orWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 2116 | 2167 | orWord32# :: Word32# -> Word32# -> Word32#
|
| 2168 | + orWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 2169 | + orWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 2170 | + orWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 2171 | + orWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 2172 | + orWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 2173 | + orWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 2117 | 2174 | orWord8# :: Word8# -> Word8# -> Word8#
|
| 2175 | + orWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 2176 | + orWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 2177 | + orWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 2118 | 2178 | ord# :: Char# -> Int#
|
| 2119 | 2179 | packDoubleX2# :: (# Double#, Double# #) -> DoubleX2#
|
| 2120 | 2180 | packDoubleX4# :: (# Double#, Double#, Double#, Double# #) -> DoubleX4#
|
| ... | ... | @@ -2886,10 +2946,40 @@ module GHC.Prim where |
| 2886 | 2946 | writeWordOffAddr# :: forall d. Addr# -> Int# -> Word# -> State# d -> State# d
|
| 2887 | 2947 | xor# :: Word# -> Word# -> Word#
|
| 2888 | 2948 | xor64# :: Word64# -> Word64# -> Word64#
|
| 2949 | + xorDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 2950 | + xorDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 2951 | + xorDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 2952 | + xorFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 2953 | + xorFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 2954 | + xorFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 2889 | 2955 | xorI# :: Int# -> Int# -> Int#
|
| 2956 | + xorInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 2957 | + xorInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 2958 | + xorInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 2959 | + xorInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 2960 | + xorInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 2961 | + xorInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 2962 | + xorInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 2963 | + xorInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 2964 | + xorInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 2965 | + xorInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 2966 | + xorInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 2967 | + xorInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 2890 | 2968 | xorWord16# :: Word16# -> Word16# -> Word16#
|
| 2969 | + xorWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 2970 | + xorWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 2971 | + xorWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 2891 | 2972 | xorWord32# :: Word32# -> Word32# -> Word32#
|
| 2973 | + xorWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 2974 | + xorWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 2975 | + xorWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 2976 | + xorWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 2977 | + xorWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 2978 | + xorWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 2892 | 2979 | xorWord8# :: Word8# -> Word8# -> Word8#
|
| 2980 | + xorWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 2981 | + xorWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 2982 | + xorWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 2893 | 2983 | yield# :: State# RealWorld -> State# RealWorld
|
| 2894 | 2984 | |
| 2895 | 2985 | module GHC.Prim.Exception where
|
| ... | ... | @@ -1423,10 +1423,40 @@ module GHC.Prim where |
| 1423 | 1423 | addrToAny# :: forall {l :: GHC.Internal.Types.Levity} (a :: TYPE (GHC.Internal.Types.BoxedRep l)). Addr# -> (# a #)
|
| 1424 | 1424 | and# :: Word# -> Word# -> Word#
|
| 1425 | 1425 | and64# :: Word64# -> Word64# -> Word64#
|
| 1426 | + andDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 1427 | + andDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 1428 | + andDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 1429 | + andFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 1430 | + andFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 1431 | + andFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 1426 | 1432 | andI# :: Int# -> Int# -> Int#
|
| 1433 | + andInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 1434 | + andInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 1435 | + andInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 1436 | + andInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 1437 | + andInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 1438 | + andInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 1439 | + andInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 1440 | + andInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 1441 | + andInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 1442 | + andInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 1443 | + andInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 1444 | + andInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 1427 | 1445 | andWord16# :: Word16# -> Word16# -> Word16#
|
| 1446 | + andWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 1447 | + andWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 1448 | + andWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 1428 | 1449 | andWord32# :: Word32# -> Word32# -> Word32#
|
| 1450 | + andWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 1451 | + andWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 1452 | + andWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 1453 | + andWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 1454 | + andWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 1455 | + andWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 1429 | 1456 | andWord8# :: Word8# -> Word8# -> Word8#
|
| 1457 | + andWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 1458 | + andWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 1459 | + andWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 1430 | 1460 | annotateStack# :: forall {q :: GHC.Internal.Types.RuntimeRep} b d (a :: TYPE q). b -> (State# d -> (# State# d, a #)) -> State# d -> (# State# d, a #)
|
| 1431 | 1461 | anyToAddr# :: forall a. a -> State# RealWorld -> (# State# RealWorld, Addr# #)
|
| 1432 | 1462 | asinDouble# :: Double# -> Double#
|
| ... | ... | @@ -2111,10 +2141,40 @@ module GHC.Prim where |
| 2111 | 2141 | numSparks# :: forall d. State# d -> (# State# d, Int# #)
|
| 2112 | 2142 | or# :: Word# -> Word# -> Word#
|
| 2113 | 2143 | or64# :: Word64# -> Word64# -> Word64#
|
| 2144 | + orDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 2145 | + orDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 2146 | + orDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 2147 | + orFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 2148 | + orFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 2149 | + orFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 2114 | 2150 | orI# :: Int# -> Int# -> Int#
|
| 2151 | + orInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 2152 | + orInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 2153 | + orInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 2154 | + orInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 2155 | + orInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 2156 | + orInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 2157 | + orInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 2158 | + orInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 2159 | + orInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 2160 | + orInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 2161 | + orInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 2162 | + orInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 2115 | 2163 | orWord16# :: Word16# -> Word16# -> Word16#
|
| 2164 | + orWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 2165 | + orWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 2166 | + orWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 2116 | 2167 | orWord32# :: Word32# -> Word32# -> Word32#
|
| 2168 | + orWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 2169 | + orWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 2170 | + orWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 2171 | + orWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 2172 | + orWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 2173 | + orWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 2117 | 2174 | orWord8# :: Word8# -> Word8# -> Word8#
|
| 2175 | + orWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 2176 | + orWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 2177 | + orWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 2118 | 2178 | ord# :: Char# -> Int#
|
| 2119 | 2179 | packDoubleX2# :: (# Double#, Double# #) -> DoubleX2#
|
| 2120 | 2180 | packDoubleX4# :: (# Double#, Double#, Double#, Double# #) -> DoubleX4#
|
| ... | ... | @@ -2886,10 +2946,40 @@ module GHC.Prim where |
| 2886 | 2946 | writeWordOffAddr# :: forall d. Addr# -> Int# -> Word# -> State# d -> State# d
|
| 2887 | 2947 | xor# :: Word# -> Word# -> Word#
|
| 2888 | 2948 | xor64# :: Word64# -> Word64# -> Word64#
|
| 2949 | + xorDoubleX2# :: DoubleX2# -> DoubleX2# -> DoubleX2#
|
|
| 2950 | + xorDoubleX4# :: DoubleX4# -> DoubleX4# -> DoubleX4#
|
|
| 2951 | + xorDoubleX8# :: DoubleX8# -> DoubleX8# -> DoubleX8#
|
|
| 2952 | + xorFloatX16# :: FloatX16# -> FloatX16# -> FloatX16#
|
|
| 2953 | + xorFloatX4# :: FloatX4# -> FloatX4# -> FloatX4#
|
|
| 2954 | + xorFloatX8# :: FloatX8# -> FloatX8# -> FloatX8#
|
|
| 2889 | 2955 | xorI# :: Int# -> Int# -> Int#
|
| 2956 | + xorInt16X16# :: Int16X16# -> Int16X16# -> Int16X16#
|
|
| 2957 | + xorInt16X32# :: Int16X32# -> Int16X32# -> Int16X32#
|
|
| 2958 | + xorInt16X8# :: Int16X8# -> Int16X8# -> Int16X8#
|
|
| 2959 | + xorInt32X16# :: Int32X16# -> Int32X16# -> Int32X16#
|
|
| 2960 | + xorInt32X4# :: Int32X4# -> Int32X4# -> Int32X4#
|
|
| 2961 | + xorInt32X8# :: Int32X8# -> Int32X8# -> Int32X8#
|
|
| 2962 | + xorInt64X2# :: Int64X2# -> Int64X2# -> Int64X2#
|
|
| 2963 | + xorInt64X4# :: Int64X4# -> Int64X4# -> Int64X4#
|
|
| 2964 | + xorInt64X8# :: Int64X8# -> Int64X8# -> Int64X8#
|
|
| 2965 | + xorInt8X16# :: Int8X16# -> Int8X16# -> Int8X16#
|
|
| 2966 | + xorInt8X32# :: Int8X32# -> Int8X32# -> Int8X32#
|
|
| 2967 | + xorInt8X64# :: Int8X64# -> Int8X64# -> Int8X64#
|
|
| 2890 | 2968 | xorWord16# :: Word16# -> Word16# -> Word16#
|
| 2969 | + xorWord16X16# :: Word16X16# -> Word16X16# -> Word16X16#
|
|
| 2970 | + xorWord16X32# :: Word16X32# -> Word16X32# -> Word16X32#
|
|
| 2971 | + xorWord16X8# :: Word16X8# -> Word16X8# -> Word16X8#
|
|
| 2891 | 2972 | xorWord32# :: Word32# -> Word32# -> Word32#
|
| 2973 | + xorWord32X16# :: Word32X16# -> Word32X16# -> Word32X16#
|
|
| 2974 | + xorWord32X4# :: Word32X4# -> Word32X4# -> Word32X4#
|
|
| 2975 | + xorWord32X8# :: Word32X8# -> Word32X8# -> Word32X8#
|
|
| 2976 | + xorWord64X2# :: Word64X2# -> Word64X2# -> Word64X2#
|
|
| 2977 | + xorWord64X4# :: Word64X4# -> Word64X4# -> Word64X4#
|
|
| 2978 | + xorWord64X8# :: Word64X8# -> Word64X8# -> Word64X8#
|
|
| 2892 | 2979 | xorWord8# :: Word8# -> Word8# -> Word8#
|
| 2980 | + xorWord8X16# :: Word8X16# -> Word8X16# -> Word8X16#
|
|
| 2981 | + xorWord8X32# :: Word8X32# -> Word8X32# -> Word8X32#
|
|
| 2982 | + xorWord8X64# :: Word8X64# -> Word8X64# -> Word8X64#
|
|
| 2893 | 2983 | yield# :: State# RealWorld -> State# RealWorld
|
| 2894 | 2984 | |
| 2895 | 2985 | module GHC.Prim.Exception where
|
| ... | ... | @@ -92,6 +92,15 @@ test('simd014', |
| 92 | 92 | # of the XMM4 register, which may not be mapped to a real machine
|
| 93 | 93 | # register on non-x86 architectures.
|
| 94 | 94 | compile_and_run, ['simd014Cmm.cmm'])
|
| 95 | +test('simd015',
|
|
| 96 | + [ when(have_llvm(), extra_ways(["optllvm"])) ],
|
|
| 97 | + compile_and_run, [''])
|
|
| 98 | +test('simd016',
|
|
| 99 | + [ when(have_llvm(), extra_ways(["optllvm"])) ],
|
|
| 100 | + compile_and_run, [''])
|
|
| 101 | +test('simd017',
|
|
| 102 | + [ when(have_llvm(), extra_ways(["optllvm"])) ],
|
|
| 103 | + compile_and_run, [''])
|
|
| 95 | 104 | |
| 96 | 105 | test('simd_insert', [], compile_and_run, [''])
|
| 97 | 106 | test('simd_insert_array', [], compile_and_run, [''])
|
| 1 | +{-# LANGUAGE MagicHash #-}
|
|
| 2 | +{-# LANGUAGE UnboxedTuples #-}
|
|
| 3 | +{-# LANGUAGE ExtendedLiterals #-}
|
|
| 4 | + |
|
| 5 | +-- bitwise instructions on floating point vectors
|
|
| 6 | + |
|
| 7 | +import GHC.Exts
|
|
| 8 | +import GHC.Int
|
|
| 9 | +import GHC.Prim
|
|
| 10 | + |
|
| 11 | + |
|
| 12 | +main :: IO ()
|
|
| 13 | +main = do
|
|
| 14 | + putStrLn "DoubleX2#"
|
|
| 15 | + let
|
|
| 16 | + !d1 = packDoubleX2# (# 1.1##, 2.2## #)
|
|
| 17 | + !d2 = packDoubleX2# (# 0.0##, 2.2## #)
|
|
| 18 | + !d3 = packDoubleX2# (# -5.5##, 32.0## #)
|
|
| 19 | + !d4 = packDoubleX2# (# 5.5##, 128.0## #)
|
|
| 20 | + |
|
| 21 | + case unpackDoubleX2# (andDoubleX2# d1 d2) of
|
|
| 22 | + (# a, b #) -> print (D# a, D# b)
|
|
| 23 | + case unpackDoubleX2# (andDoubleX2# d3 d4) of
|
|
| 24 | + (# c, d #) -> print (D# c, D# d)
|
|
| 25 | + case unpackDoubleX2# (orDoubleX2# d1 d2) of
|
|
| 26 | + (# a, b #) -> print (D# a, D# b)
|
|
| 27 | + case unpackDoubleX2# (orDoubleX2# d3 d4) of
|
|
| 28 | + (# c, d #) -> print (D# c, D# d)
|
|
| 29 | + case unpackDoubleX2# (xorDoubleX2# d1 d2) of
|
|
| 30 | + (# a, b #) -> print (D# a, D# b)
|
|
| 31 | + case unpackDoubleX2# (xorDoubleX2# d3 d4) of
|
|
| 32 | + (# c, d #) -> print (D# c, D# d)
|
|
| 33 | + |
|
| 34 | + putStrLn ""
|
|
| 35 | + putStrLn "FloatX4#"
|
|
| 36 | + let
|
|
| 37 | + !f1 = packFloatX4# (# 1.1#, 2.2#, -5.5#, 128.0# #)
|
|
| 38 | + !f2 = packFloatX4# (# 0.0#, 2.2#, 5.5#, 32.0# #)
|
|
| 39 | + |
|
| 40 | + case unpackFloatX4# (andFloatX4# f1 f2) of
|
|
| 41 | + (# a, b, c, d #) -> print (F# a, F# b, F# c, F# d)
|
|
| 42 | + case unpackFloatX4# (orFloatX4# f1 f2) of
|
|
| 43 | + (# a, b, c, d #) -> print (F# a, F# b, F# c, F# d)
|
|
| 44 | + case unpackFloatX4# (xorFloatX4# f1 f2) of
|
|
| 45 | + (# a, b, c, d #) -> print (F# a, F# b, F# c, F# d) |
| 1 | +DoubleX2#
|
|
| 2 | +(0.0,2.2)
|
|
| 3 | +(5.5,32.0)
|
|
| 4 | +(1.1,2.2)
|
|
| 5 | +(-5.5,128.0)
|
|
| 6 | +(1.1,0.0)
|
|
| 7 | +(-0.0,4.450147717014403e-308)
|
|
| 8 | + |
|
| 9 | +FloatX4#
|
|
| 10 | +(0.0,2.2,5.5,32.0)
|
|
| 11 | +(1.1,2.2,-5.5,128.0)
|
|
| 12 | +(1.1,0.0,-0.0,2.3509887e-38) |
| 1 | +{-# LANGUAGE MagicHash #-}
|
|
| 2 | +{-# LANGUAGE UnboxedTuples #-}
|
|
| 3 | +{-# LANGUAGE ExtendedLiterals #-}
|
|
| 4 | + |
|
| 5 | +-- bitwise instructions on signed integer vectors
|
|
| 6 | + |
|
| 7 | +import GHC.Exts
|
|
| 8 | +import GHC.Int
|
|
| 9 | +import GHC.Prim
|
|
| 10 | + |
|
| 11 | + |
|
| 12 | +main :: IO ()
|
|
| 13 | +main = do
|
|
| 14 | + putStrLn "Int64X2#"
|
|
| 15 | + let
|
|
| 16 | + !i64_1 = packInt64X2# (# 1#Int64, 2#Int64 #)
|
|
| 17 | + !i64_2 = packInt64X2# (# 0#Int64, 2#Int64 #)
|
|
| 18 | + !i64_3 = packInt64X2# (# -5#Int64, 128#Int64 #)
|
|
| 19 | + !i64_4 = packInt64X2# (# 5#Int64, 32#Int64 #)
|
|
| 20 | + |
|
| 21 | + case unpackInt64X2# (andInt64X2# i64_1 i64_2) of
|
|
| 22 | + (# a, b #) -> print (I64# a, I64# b)
|
|
| 23 | + case unpackInt64X2# (andInt64X2# i64_3 i64_4) of
|
|
| 24 | + (# c, d #) -> print (I64# c, I64# d)
|
|
| 25 | + case unpackInt64X2# (orInt64X2# i64_1 i64_2) of
|
|
| 26 | + (# a, b #) -> print (I64# a, I64# b)
|
|
| 27 | + case unpackInt64X2# (orInt64X2# i64_3 i64_4) of
|
|
| 28 | + (# c, d #) -> print (I64# c, I64# d)
|
|
| 29 | + case unpackInt64X2# (xorInt64X2# i64_1 i64_2) of
|
|
| 30 | + (# a, b #) -> print (I64# a, I64# b)
|
|
| 31 | + case unpackInt64X2# (xorInt64X2# i64_3 i64_4) of
|
|
| 32 | + (# c, d #) -> print (I64# c, I64# d)
|
|
| 33 | + |
|
| 34 | + putStrLn ""
|
|
| 35 | + putStrLn "Int32X4#"
|
|
| 36 | + let
|
|
| 37 | + !i32_1 = packInt32X4# (# 1#Int32, 2#Int32, -5#Int32, 128#Int32 #)
|
|
| 38 | + !i32_2 = packInt32X4# (# 0#Int32, 2#Int32, 5#Int32, 32#Int32 #)
|
|
| 39 | + |
|
| 40 | + case unpackInt32X4# (andInt32X4# i32_1 i32_2) of
|
|
| 41 | + (# a, b, c, d #) -> print (I32# a, I32# b, I32# c, I32# d)
|
|
| 42 | + case unpackInt32X4# (orInt32X4# i32_1 i32_2) of
|
|
| 43 | + (# a, b, c, d #) -> print (I32# a, I32# b, I32# c, I32# d)
|
|
| 44 | + case unpackInt32X4# (xorInt32X4# i32_1 i32_2) of
|
|
| 45 | + (# a, b, c, d #) -> print (I32# a, I32# b, I32# c, I32# d)
|
|
| 46 | + |
|
| 47 | + putStrLn ""
|
|
| 48 | + putStrLn "Int16X8#"
|
|
| 49 | + let
|
|
| 50 | + !i16_1 = packInt16X8#
|
|
| 51 | + (# 1#Int16, 2#Int16, -5#Int16, 128#Int16
|
|
| 52 | + , 1#Int16, 2#Int16, -5#Int16, 128#Int16
|
|
| 53 | + #)
|
|
| 54 | + !i16_2 = packInt16X8#
|
|
| 55 | + (# 0#Int16, 2#Int16, 5#Int16, 32#Int16
|
|
| 56 | + , 0#Int16, 2#Int16, 5#Int16, 32#Int16
|
|
| 57 | + #)
|
|
| 58 | + case unpackInt16X8# (andInt16X8# i16_1 i16_2) of
|
|
| 59 | + (# a, b, c, d, e, f, g, h #) ->
|
|
| 60 | + print
|
|
| 61 | + ( (I16# a, I16# b, I16# c, I16# d)
|
|
| 62 | + , (I16# e, I16# f, I16# g, I16# h)
|
|
| 63 | + )
|
|
| 64 | + case unpackInt16X8# (orInt16X8# i16_1 i16_2) of
|
|
| 65 | + (# a, b, c, d, e, f, g, h #) ->
|
|
| 66 | + print
|
|
| 67 | + ( (I16# a, I16# b, I16# c, I16# d)
|
|
| 68 | + , (I16# e, I16# f, I16# g, I16# h)
|
|
| 69 | + )
|
|
| 70 | + case unpackInt16X8# (xorInt16X8# i16_1 i16_2) of
|
|
| 71 | + (# a, b, c, d, e, f, g, h #) ->
|
|
| 72 | + print
|
|
| 73 | + ( (I16# a, I16# b, I16# c, I16# d)
|
|
| 74 | + , (I16# e, I16# f, I16# g, I16# h)
|
|
| 75 | + )
|
|
| 76 | + |
|
| 77 | + putStrLn ""
|
|
| 78 | + putStrLn "Int8X16#"
|
|
| 79 | + let
|
|
| 80 | + !i8_1 = packInt8X16#
|
|
| 81 | + (# 1#Int8, 2#Int8, -5#Int8, 128#Int8
|
|
| 82 | + , 1#Int8, 2#Int8, -5#Int8, 128#Int8
|
|
| 83 | + , 1#Int8, 2#Int8, -5#Int8, 128#Int8
|
|
| 84 | + , 1#Int8, 2#Int8, -5#Int8, 128#Int8
|
|
| 85 | + #)
|
|
| 86 | + !i8_2 = packInt8X16#
|
|
| 87 | + (# 0#Int8, 2#Int8, 5#Int8, 32#Int8
|
|
| 88 | + , 0#Int8, 2#Int8, 5#Int8, 32#Int8
|
|
| 89 | + , 0#Int8, 2#Int8, 5#Int8, 32#Int8
|
|
| 90 | + , 0#Int8, 2#Int8, 5#Int8, 32#Int8
|
|
| 91 | + #)
|
|
| 92 | + case unpackInt8X16# (andInt8X16# i8_1 i8_2) of
|
|
| 93 | + (# a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p #) ->
|
|
| 94 | + print
|
|
| 95 | + ( (I8# a, I8# b, I8# c, I8# d)
|
|
| 96 | + , (I8# e, I8# f, I8# g, I8# h)
|
|
| 97 | + , (I8# i, I8# j, I8# k, I8# l)
|
|
| 98 | + , (I8# m, I8# n, I8# o, I8# p)
|
|
| 99 | + )
|
|
| 100 | + case unpackInt8X16# (orInt8X16# i8_1 i8_2) of
|
|
| 101 | + (# a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p #) ->
|
|
| 102 | + print
|
|
| 103 | + ( (I8# a, I8# b, I8# c, I8# d)
|
|
| 104 | + , (I8# e, I8# f, I8# g, I8# h)
|
|
| 105 | + , (I8# i, I8# j, I8# k, I8# l)
|
|
| 106 | + , (I8# m, I8# n, I8# o, I8# p)
|
|
| 107 | + )
|
|
| 108 | + case unpackInt8X16# (xorInt8X16# i8_1 i8_2) of
|
|
| 109 | + (# a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p #) ->
|
|
| 110 | + print
|
|
| 111 | + ( (I8# a, I8# b, I8# c, I8# d)
|
|
| 112 | + , (I8# e, I8# f, I8# g, I8# h)
|
|
| 113 | + , (I8# i, I8# j, I8# k, I8# l)
|
|
| 114 | + , (I8# m, I8# n, I8# o, I8# p)
|
|
| 115 | + ) |
| 1 | +Int64X2#
|
|
| 2 | +(0,2)
|
|
| 3 | +(1,0)
|
|
| 4 | +(1,2)
|
|
| 5 | +(-1,160)
|
|
| 6 | +(1,0)
|
|
| 7 | +(-2,160)
|
|
| 8 | + |
|
| 9 | +Int32X4#
|
|
| 10 | +(0,2,1,0)
|
|
| 11 | +(1,2,-1,160)
|
|
| 12 | +(1,0,-2,160)
|
|
| 13 | + |
|
| 14 | +Int16X8#
|
|
| 15 | +((0,2,1,0),(0,2,1,0))
|
|
| 16 | +((1,2,-1,160),(1,2,-1,160))
|
|
| 17 | +((1,0,-2,160),(1,0,-2,160))
|
|
| 18 | + |
|
| 19 | +Int8X16#
|
|
| 20 | +((0,2,1,0),(0,2,1,0),(0,2,1,0),(0,2,1,0))
|
|
| 21 | +((1,2,-1,-96),(1,2,-1,-96),(1,2,-1,-96),(1,2,-1,-96))
|
|
| 22 | +((1,0,-2,-96),(1,0,-2,-96),(1,0,-2,-96),(1,0,-2,-96)) |
| 1 | +{-# LANGUAGE MagicHash #-}
|
|
| 2 | +{-# LANGUAGE UnboxedTuples #-}
|
|
| 3 | +{-# LANGUAGE ExtendedLiterals #-}
|
|
| 4 | + |
|
| 5 | +-- bitwise instructions on unsigned integer vectors
|
|
| 6 | + |
|
| 7 | +import GHC.Exts
|
|
| 8 | +import GHC.Word
|
|
| 9 | +import GHC.Prim
|
|
| 10 | + |
|
| 11 | + |
|
| 12 | +main :: IO ()
|
|
| 13 | +main = do
|
|
| 14 | + putStrLn "Word64X2#"
|
|
| 15 | + let
|
|
| 16 | + !w64_1 = packWord64X2# (# 1#Word64, 2#Word64 #)
|
|
| 17 | + !w64_2 = packWord64X2# (# 0#Word64, 2#Word64 #)
|
|
| 18 | + !w64_3 = packWord64X2# (# 18446744073709551615#Word64, 128#Word64 #)
|
|
| 19 | + !w64_4 = packWord64X2# (# 5#Word64, 32#Word64 #)
|
|
| 20 | + |
|
| 21 | + case unpackWord64X2# (andWord64X2# w64_1 w64_2) of
|
|
| 22 | + (# a, b #) -> print (W64# a, W64# b)
|
|
| 23 | + case unpackWord64X2# (andWord64X2# w64_3 w64_4) of
|
|
| 24 | + (# c, d #) -> print (W64# c, W64# d)
|
|
| 25 | + case unpackWord64X2# (orWord64X2# w64_1 w64_2) of
|
|
| 26 | + (# a, b #) -> print (W64# a, W64# b)
|
|
| 27 | + case unpackWord64X2# (orWord64X2# w64_3 w64_4) of
|
|
| 28 | + (# c, d #) -> print (W64# c, W64# d)
|
|
| 29 | + case unpackWord64X2# (xorWord64X2# w64_1 w64_2) of
|
|
| 30 | + (# a, b #) -> print (W64# a, W64# b)
|
|
| 31 | + case unpackWord64X2# (xorWord64X2# w64_3 w64_4) of
|
|
| 32 | + (# c, d #) -> print (W64# c, W64# d)
|
|
| 33 | + |
|
| 34 | + putStrLn ""
|
|
| 35 | + putStrLn "Word32X4#"
|
|
| 36 | + let
|
|
| 37 | + !w32_1 = packWord32X4# (# 1#Word32, 2#Word32, 4294967295#Word32, 128#Word32 #)
|
|
| 38 | + !w32_2 = packWord32X4# (# 0#Word32, 2#Word32, 5#Word32, 32#Word32 #)
|
|
| 39 | + |
|
| 40 | + case unpackWord32X4# (andWord32X4# w32_1 w32_2) of
|
|
| 41 | + (# a, b, c, d #) -> print (W32# a, W32# b, W32# c, W32# d)
|
|
| 42 | + case unpackWord32X4# (orWord32X4# w32_1 w32_2) of
|
|
| 43 | + (# a, b, c, d #) -> print (W32# a, W32# b, W32# c, W32# d)
|
|
| 44 | + case unpackWord32X4# (xorWord32X4# w32_1 w32_2) of
|
|
| 45 | + (# a, b, c, d #) -> print (W32# a, W32# b, W32# c, W32# d)
|
|
| 46 | + |
|
| 47 | + putStrLn ""
|
|
| 48 | + putStrLn "Word16X8#"
|
|
| 49 | + let
|
|
| 50 | + !w16_1 = packWord16X8#
|
|
| 51 | + (# 1#Word16, 2#Word16, 65535#Word16, 128#Word16
|
|
| 52 | + , 1#Word16, 2#Word16, 65535#Word16, 128#Word16
|
|
| 53 | + #)
|
|
| 54 | + !w16_2 = packWord16X8#
|
|
| 55 | + (# 0#Word16, 2#Word16, 5#Word16, 32#Word16
|
|
| 56 | + , 0#Word16, 2#Word16, 5#Word16, 32#Word16
|
|
| 57 | + #)
|
|
| 58 | + case unpackWord16X8# (andWord16X8# w16_1 w16_2) of
|
|
| 59 | + (# a, b, c, d, e, f, g, h #) ->
|
|
| 60 | + print
|
|
| 61 | + ( (W16# a, W16# b, W16# c, W16# d)
|
|
| 62 | + , (W16# e, W16# f, W16# g, W16# h)
|
|
| 63 | + )
|
|
| 64 | + case unpackWord16X8# (orWord16X8# w16_1 w16_2) of
|
|
| 65 | + (# a, b, c, d, e, f, g, h #) ->
|
|
| 66 | + print
|
|
| 67 | + ( (W16# a, W16# b, W16# c, W16# d)
|
|
| 68 | + , (W16# e, W16# f, W16# g, W16# h)
|
|
| 69 | + )
|
|
| 70 | + case unpackWord16X8# (xorWord16X8# w16_1 w16_2) of
|
|
| 71 | + (# a, b, c, d, e, f, g, h #) ->
|
|
| 72 | + print
|
|
| 73 | + ( (W16# a, W16# b, W16# c, W16# d)
|
|
| 74 | + , (W16# e, W16# f, W16# g, W16# h)
|
|
| 75 | + )
|
|
| 76 | + |
|
| 77 | + putStrLn ""
|
|
| 78 | + putStrLn "Word8X16#"
|
|
| 79 | + let
|
|
| 80 | + !w8_1 = packWord8X16#
|
|
| 81 | + (# 1#Word8, 2#Word8, 255#Word8, 128#Word8
|
|
| 82 | + , 1#Word8, 2#Word8, 255#Word8, 128#Word8
|
|
| 83 | + , 1#Word8, 2#Word8, 255#Word8, 128#Word8
|
|
| 84 | + , 1#Word8, 2#Word8, 255#Word8, 128#Word8
|
|
| 85 | + #)
|
|
| 86 | + !w8_2 = packWord8X16#
|
|
| 87 | + (# 0#Word8, 2#Word8, 5#Word8, 32#Word8
|
|
| 88 | + , 0#Word8, 2#Word8, 5#Word8, 32#Word8
|
|
| 89 | + , 0#Word8, 2#Word8, 5#Word8, 32#Word8
|
|
| 90 | + , 0#Word8, 2#Word8, 5#Word8, 32#Word8
|
|
| 91 | + #)
|
|
| 92 | + case unpackWord8X16# (andWord8X16# w8_1 w8_2) of
|
|
| 93 | + (# a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p #) ->
|
|
| 94 | + print
|
|
| 95 | + ( (W8# a, W8# b, W8# c, W8# d)
|
|
| 96 | + , (W8# e, W8# f, W8# g, W8# h)
|
|
| 97 | + , (W8# i, W8# j, W8# k, W8# l)
|
|
| 98 | + , (W8# m, W8# n, W8# o, W8# p)
|
|
| 99 | + )
|
|
| 100 | + case unpackWord8X16# (orWord8X16# w8_1 w8_2) of
|
|
| 101 | + (# a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p #) ->
|
|
| 102 | + print
|
|
| 103 | + ( (W8# a, W8# b, W8# c, W8# d)
|
|
| 104 | + , (W8# e, W8# f, W8# g, W8# h)
|
|
| 105 | + , (W8# i, W8# j, W8# k, W8# l)
|
|
| 106 | + , (W8# m, W8# n, W8# o, W8# p)
|
|
| 107 | + )
|
|
| 108 | + case unpackWord8X16# (xorWord8X16# w8_1 w8_2) of
|
|
| 109 | + (# a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p #) ->
|
|
| 110 | + print
|
|
| 111 | + ( (W8# a, W8# b, W8# c, W8# d)
|
|
| 112 | + , (W8# e, W8# f, W8# g, W8# h)
|
|
| 113 | + , (W8# i, W8# j, W8# k, W8# l)
|
|
| 114 | + , (W8# m, W8# n, W8# o, W8# p)
|
|
| 115 | + ) |
| 1 | +Word64X2#
|
|
| 2 | +(0,2)
|
|
| 3 | +(5,0)
|
|
| 4 | +(1,2)
|
|
| 5 | +(18446744073709551615,160)
|
|
| 6 | +(1,0)
|
|
| 7 | +(18446744073709551610,160)
|
|
| 8 | + |
|
| 9 | +Word32X4#
|
|
| 10 | +(0,2,5,0)
|
|
| 11 | +(1,2,4294967295,160)
|
|
| 12 | +(1,0,4294967290,160)
|
|
| 13 | + |
|
| 14 | +Word16X8#
|
|
| 15 | +((0,2,5,0),(0,2,5,0))
|
|
| 16 | +((1,2,65535,160),(1,2,65535,160))
|
|
| 17 | +((1,0,65530,160),(1,0,65530,160))
|
|
| 18 | + |
|
| 19 | +Word8X16#
|
|
| 20 | +((0,2,5,0),(0,2,5,0),(0,2,5,0),(0,2,5,0))
|
|
| 21 | +((1,2,255,160),(1,2,255,160),(1,2,255,160),(1,2,255,160))
|
|
| 22 | +((1,0,250,160),(1,0,250,160),(1,0,250,160),(1,0,250,160)) |