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023c301c
by sheaf at 2026-01-13T04:57:30-05:00
Don't re-use stack slots for growing registers
This commit avoids re-using a stack slot for a register that has grown
but already had a stack slot.
For example, suppose we have stack slot assigments
%v1 :: FF64 |-> StackSlot 0
%v2 :: FF64 |-> StackSlot 1
Later, we start using %v1 at a larger format (e.g. F64x2) and we need
to spill it again. Then we **must not** use StackSlot 0, as a spill
at format F64x2 would clobber the data in StackSlot 1.
This can cause some fragmentation of the `StackMap`, but that's probably
OK.
Fixes #26668
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d0966e64
by fendor at 2026-01-13T04:58:11-05:00
Remove `traceId` from ghc-pkg executable
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20d7efec
by Simon Peyton Jones at 2026-01-13T12:41:22-05:00
Make SpecContr rules fire a bit later
See #26615 and Note [SpecConstr rule activation]
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8bc4eb8c
by Andrew Lelechenko at 2026-01-13T12:42:03-05:00
Upgrade mtl submodule to 2.3.2
Fixes #26656
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c94aaacd
by Cheng Shao at 2026-01-13T12:42:44-05:00
compiler: remove iserv and only use on-demand external interpreter
This patch removes `iserv` from the tree completely. Hadrian would no
longer build or distribute `iserv`, and the GHC driver would use the
on-demand external interpreter by default when invoked with
`-fexternal-interpreter`, without needing to specify `-pgmi ""`. This
has multiple benefits:
- It allows cleanup of a lot of legacy hacks in the hadrian codebase.
- It paves the way for running cross ghc's iserv via cross emulator
(#25523), fixing TH/ghci support for cross targets other than
wasm/js.
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c1fe0097
by Peter Trommler at 2026-01-14T03:54:49-05:00
PPC NCG: Fix shift right MO code
The shift amount in shift right [arithmetic] MOs is machine word
width. Therefore remove unnecessary zero- or sign-extending of
shift amount.
It looks harmless to extend the shift amount argument because the
shift right instruction uses only the seven lowest bits (i. e. mod 128).
But now we have a conversion operation from a smaller type to word width
around a memory load at word width. The types are not matching up but
there is no check done in CodeGen. The necessary conversion from word
width down to the smaller width would be translated into a no-op on
PowerPC anyway. So all seems harmless if it was not for a small
optimisation in getRegister'.
In getRegister' a load instruction with the smaller width of the
conversion operation was generated. This loaded the most significant
bits of the word in memory on a big-endian platform. These bits were
zero and hence shift right was used with shift amount zero and not one
as required in test Sized.
Fixes #26519
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2dafc65a
by Cheng Shao at 2026-01-14T03:55:31-05:00
Tree-wide cleanup of cygwin logic
GHC has not supported cygwin for quite a few years already, and will
not resume support in the forseeable future. The only supported
windows toolchain is clang64/clangarm64 of the msys2 project. This
patch cleans up the unused cygwin logic in the tree.
Co-authored-by: Codex <codex@openai.com>
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66b96e2a
by Teo Camarasu at 2026-01-14T03:56:13-05:00
Set default eventlog-flush-interval to 5s
Resolves #26707
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d0254579
by Andrew Lelechenko at 2026-01-14T03:56:53-05:00
Document when -maxN RTS option was added
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4a01ec30
by Simon Peyton Jones at 2026-01-14T10:22:12+00:00
Improve newtype unwrapping
Ticket #26746 describes several relatively-minor shortcomings of newtype
unwrapping. This MR addresses them, while also (arguably) simplifying
the code a bit.
See new Note [Solving newtype equalities: overview]
and Note [Decomposing newtype equalities]
and Note [Eager newtype decomposition]
and Note [Even more eager newtype decomposition]