MO_W64X2_Max -> unsupported mop

         -- Memory Ordering

         MO_Touch        -> pure nilOL -- Keep variables live (when using interior pointers)

         -- Prefetch

                       MemOrderAcquire -> toOL [

                                                 ann moDescr (LD (intFormat w) (OpReg w dst) (OpAddr $ AddrReg p)),

                                               ]

                                               ]

                       _ -> panic $ "Unexpected MemOrderRelease on an AtomicRead: " ++ show mo

                   dst = getRegisterReg platform (CmmLocal dst_reg)

               (val, fmt_val, code_val) <- getSomeReg val_reg

               let instrs = case ord of

                       MemOrderRelaxed -> unitOL $ ann moDescr (ST fmt_val (OpReg w val) (OpAddr $ AddrReg p))

                       _ ->  panic $ "Unexpected MemOrderAcquire on an AtomicWrite" ++ show mo

                   moDescr = (text . show) mo

                   code =

   -- LDCOND dst src1 src2     -> usage (regOp src1 ++ regOp src2, regOp dst)

   -- STCOND dst src1 src2     -> usage (regOp src1 ++ regOp src2, regOp dst)

   -- 7. Atomic Memory Access Instructions --------------------------------------

   -- 8. Barrier Instructions ---------------------------------------------------

   DBAR _hint               -> usage ([], [])

   IBAR _hint               -> usage ([], [])

     STX f o1 o2        -> STX f (patchOp o1)  (patchOp o2)

     LDPTR f o1 o2      -> LDPTR f (patchOp o1)  (patchOp o2)

     STPTR f o1 o2      -> STPTR f (patchOp o1)  (patchOp o2)

     -- 6. Bound Check Memory Access Instructions ---------------------------------

     -- LDCOND o1 o2 o3       -> LDCOND  (patchOp o1)  (patchOp o2)  (patchOp o3)

     -- STCOND o1 o2 o3       -> STCOND  (patchOp o1)  (patchOp o2)  (patchOp o3)

     -- 7. Atomic Memory Access Instructions --------------------------------------

     -- 8. Barrier Instructions ---------------------------------------------------

     DBAR o1             -> DBAR o1

     IBAR o1             -> IBAR o1

     -- 11. Floating Point Instructions -------------------------------------------

     | PRELD Operand Operand

     -- 6. Bound Check Memory Access Instructions ---------------------------------

     -- 7. Atomic Memory Access Instructions --------------------------------------

     -- 8. Barrier Instructions ---------------------------------------------------

     | DBAR BarrierType

     | IBAR BarrierType

     --  fnmadd: d = - r1 * r2 - r3

     | FMA FMASign Operand Operand Operand Operand

 instrCon :: Instr -> String

 instrCon i =

       LDPTR{} -> "LDPTR"

       STPTR{} -> "STPTR"

       PRELD{} -> "PRELD"

       DBAR{} -> "DBAR"

       IBAR{} -> "IBAR"

       FCVT{} -> "FCVT"

     -- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}

   -- 7. Atomic Memory Access Instructions --------------------------------------

     -- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[DB].{W/D}, AM{MAX/MIN}[_DB].{WU/DU}

     -- AM.{SWAP/ADD}[_DB].{B/H}

     -- AMCAS[_DB].{B/H/W/D}

     -- LL.{W/D}, SC.{W/D}

         op3 op o1 o2 o3     = line $ op <+> pprOp platform o1 <> comma <+> pprOp platform o2 <> comma <+> pprOp platform o3

         op4 op o1 o2 o3 o4  = line $ op <+> pprOp platform o1 <> comma <+> pprOp platform o2 <> comma <+> pprOp platform o3 <> comma <+> pprOp platform o4

 {-

     On LoongArch uses "dbar 0" (full completion barrier) for everything.

     But the full completion barrier has no performance to tell, so

     Loongson-3A6000 and newer processors have made finer granularity hints

     available:

     Bit4: ordering or completion (0: completion, 1: ordering)

     Bit3: barrier for previous read (0: true, 1: false)

     Bit2: barrier for previous write (0: true, 1: false)

     Bit1: barrier for succeeding read (0: true, 1: false)

     Bit0: barrier for succeeding write (0: true, 1: false)

 -}

         pprBarrierType Hint0 = text "0x0"

         floatPrecission o | isSingleOp o = text "s"

                           | isDoubleOp o = text "d"

                           | otherwise  = pprPanic "Impossible floating point precission: " (pprOp platform o)

 import GHC.Core.Predicate

 import GHC.Core.Type

 import GHC.Core.Utils

 import GHC.Types.Id

 import GHC.Types.Name

 import GHC.Types.SrcLoc

 type OverloadedCallsCCState = Strict.Maybe SrcSpan

 -- | Insert cost centres on function applications with dictionary arguments. The

 -- source locations attached to the cost centres is approximated based on the

 -- "closest" source note encountered in the traversal.

              CoreBndr

           -> LateCCM OverloadedCallsCCState CoreExpr

           -> LateCCM OverloadedCallsCCState CoreExpr

             expr <- pexpr

     processExpr :: CoreExpr -> LateCCM OverloadedCallsCCState CoreExpr

     processExpr expr =

               -- Avoid instrumenting join points.

               -- (See comment in processBind above)

             && not (isJoinVarExpr f)

           then do

             -- Extract a name and source location from the function being

     Some overloaded calls may not be annotated, specifically in cases where the

     optimizer turns an overloaded function into a join point. Calls to such

     functions will not be wrapped in ``SCC`` annotations, since it would make

 .. ghc-flag:: -fprof-cafs

     :shortdesc: Auto-add ``SCC``\\ s to all CAFs

     restore_locale();

 }

 void

         // Eventlog

                 (census->void_total * sizeof(W_)));

                 ((census->not_used - census->void_total) *

                                      sizeof(W_)));

                 ((census->used - census->drag_total) *

                                      sizeof(W_)));

                 (census->prim * sizeof(W_)));

                 (census->drag_total * sizeof(W_)));

         traceHeapProfSampleEnd(era);

         switch (RtsFlags.ProfFlags.doHeapProfile) {

         case HEAP_BY_CLOSURE_TYPE:

             fprintf(hp_file, "%s", (char *)ctr->identity);

                                       count * sizeof(W_));

             break;

         case HEAP_BY_INFO_TABLE:

             fprintf(hp_file, "%p", ctr->identity);

             char str[100];

             sprintf(str, "%p", ctr->identity);

             break;

 #if defined(PROFILING)

         case HEAP_BY_CCS:

             fprint_ccs(hp_file, (CostCentreStack *)ctr->identity,

                        RtsFlags.ProfFlags.ccsLength);

                                           count * sizeof(W_));

             break;

         case HEAP_BY_ERA:

             fprintf(hp_file, "%" FMT_Word, (StgWord)ctr->identity);

             char str_era[100];

             sprintf(str_era, "%" FMT_Word, (StgWord)ctr->identity);

             break;

         case HEAP_BY_MOD:

         case HEAP_BY_DESCR:

         case HEAP_BY_TYPE:

             fprintf(hp_file, "%s", (char *)ctr->identity);

                                       count * sizeof(W_));

             break;

         case HEAP_BY_RETAINER:

         }

     }

     fputs(tmp, f);

 }

 /* -----------------------------------------------------------------------------

     }

 }

 {

     if (eventlog_enabled) {

     }

 }

 void traceHeapBioProfSampleBegin(StgInt era, StgWord64 time)

     }

 }

 {

     if (eventlog_enabled) {

     }

 }

 }

 // This one is for .hp samples

 {

     if (eventlog_enabled) {

     }

 }

 void traceTaskDelete_ (Task       *task);

 void traceHeapProfSampleBegin(StgInt era);

 void traceHeapBioProfSampleBegin(StgInt era, StgWord64 time);

 void traceHeapProfSampleEnd(StgInt era);

 #if defined(PROFILING)

 void traceHeapProfCostCentre(StgWord32 ccID,

                              const char *label,

                              const char *module,

                              const char *srcloc,

                              StgBool is_caf);

 void traceProfSampleCostCentre(Capability *cap,

                                CostCentreStack *stack, StgWord ticks);

 #define traceTaskCreate_(taskID, cap) /* nothing */

 #define traceTaskMigrate_(taskID, cap, new_cap) /* nothing */

 #define traceTaskDelete_(taskID) /* nothing */

 #define traceHeapProfCostCentre(ccID, label, module, srcloc, is_caf) /* nothing */

 #define traceIPE(ipe) /* nothing */

 #define traceHeapProfSampleBegin(era) /* nothing */

 #define traceHeapBioProfSampleBegin(era, time) /* nothing */

 #define traceHeapProfSampleEnd(era) /* nothing */

 #define traceConcMarkBegin() /* nothing */

 #define traceConcMarkEnd(marked_obj_count) /* nothing */

  * buffer size, EVENT_LOG_SIZE. We must ensure that no variable-length event

  * exceeds this limit. For this reason we impose maximum length limits on

  * fields which may have unbounded values.

  */

 static const EventLogWriter *event_log_writer = NULL;

     }

 }

 {

     ACQUIRE_LOCK(&eventBufMutex);

     PROFILING_FLAGS *flags = &RtsFlags.ProfFlags;

     CHECK(!ensureRoomForVariableEvent(&eventBuf, len));

     postEventHeader(&eventBuf, EVENT_HEAP_PROF_BEGIN);

     postPayloadSize(&eventBuf, len);

     postWord64(&eventBuf, TimeToNS(flags->heapProfileInterval));

     postWord32(&eventBuf, getHeapProfBreakdown());

     postStringLen(&eventBuf, flags->modSelector, modSelector_len);

     RELEASE_LOCK(&eventBufMutex);

 }

                               StgWord64 residency)

 {

     ACQUIRE_LOCK(&eventBufMutex);

     CHECK(!ensureRoomForVariableEvent(&eventBuf, len));

     postEventHeader(&eventBuf, EVENT_HEAP_PROF_SAMPLE_STRING);

     postPayloadSize(&eventBuf, len);

     postWord64(&eventBuf, residency);

     postStringLen(&eventBuf, label, label_len);

     RELEASE_LOCK(&eventBufMutex);

     RELEASE_LOCK(&eventBufMutex);

 }

                                   StgWord64 residency)

 {

     ACQUIRE_LOCK(&eventBufMutex);

     CHECK(!ensureRoomForVariableEvent(&eventBuf, len));

     postEventHeader(&eventBuf, EVENT_HEAP_PROF_SAMPLE_COST_CENTRE);

     postPayloadSize(&eventBuf, len);

     postWord64(&eventBuf, residency);

     postWord8(&eventBuf, depth);

     for (ccs = stack;

 void postTaskDeleteEvent (EventTaskId taskId);

 void postHeapProfSampleBegin(StgInt era);

 void postHeapBioProfSampleBegin(StgInt era, StgWord64 time_ns);

 void postHeapProfSampleEnd(StgInt era);

                               StgWord64 residency);

 #if defined(PROFILING)

                             const char *srcloc,

                             StgBool is_caf);

                                   StgWord64 residency);

 void postProfSampleCostCentre(Capability *cap,