I've never understood why functional (and in particular Haskell-influenced) approaches to hardware never took off. I suspect it was political (Haskell is too academic, etc.), or perhaps the companies using it are just quiet about it :)

I think you could use monads for clock domains. Once something has a clocked input, its output will be clocked too - it fits well with the "lift anything unclocked to clocked, but once clocked it is *always* clocked".

Kind of tangential, but bluespev verilog is a "Haskell inspired" version of verilog that has a strong Haskell flavour (typeclasses, purity, a rudimentary effect system that tracks combinational versus state based logic, clock domains embedded into the type, width polymorphic functions, etc).

It's a really great way to see what a haskell-like-hardware description language could look like :)

Cheers

siddharth

On Sun 21 Oct, 2018, 12:34 Joachim Durchholz, <jo@durchholz.org> wrote:

Am 21.10.18 um 04:52 schrieb Will Yager:
>
> This is the basis of projects like Clash (Haskell to HDLs).  I imagine one could extend the clash approach to generate allocation-free assembly from the same (large) subset of Haskell.

Is that subset described somewhere?

Regards,
Jo
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