Marge Bot pushed to branch wip/marge_bot_batch_merge_job at Glasgow Haskell Compiler / GHC
Commits:
e8f5a45d by sterni at 2026-01-29T04:19:18-05:00
users_guide: fix runtime error during build with Sphinx 9.1.0
Appears that pathto is stricter about what it accepts now.
Tested Sphinx 8.2.3 and 9.1.0 on the ghc-9.10 branch.
Resolves #26810.
Co-authored-by: Martin Weinelt
- - - - -
afa10261 by Jessica Clarke at 2026-01-29T11:58:13-05:00
PPC NCG: Use libcall for 64-bit cmpxchg on 32-bit PowerPC
There is no native instruction for this, and even if there were a
register pair version we could use, the implementation here is assuming
the values fit in a single register, and we end up only using / defining
the low halves of the registers.
Fixes: b4d39adbb5 ("PrimOps: Add CAS op for all int sizes")
Fixes: #23969
- - - - -
347d1141 by Michael Karcher at 2026-01-29T11:58:20-05:00
NCG for PPC: add pattern for CmmRegOff to iselExpr64
Closes #26828
- - - - -
2 changed files:
- compiler/GHC/CmmToAsm/PPC/CodeGen.hs
- docs/users_guide/rtd-theme/layout.html
Changes:
=====================================
compiler/GHC/CmmToAsm/PPC/CodeGen.hs
=====================================
@@ -180,7 +180,7 @@ stmtToInstrs stmt = do
format = cmmTypeFormat ty
CmmUnsafeForeignCall target result_regs args
- -> genCCall target result_regs args
+ -> genCCall platform target result_regs args
CmmBranch id -> genBranch id
CmmCondBranch arg true false prediction -> do
@@ -338,6 +338,8 @@ iselExpr64 (CmmReg (CmmLocal local_reg)) = do
let Reg64 hi lo = localReg64 local_reg
return (RegCode64 nilOL hi lo)
+iselExpr64 regoff@(CmmRegOff _ _) = iselExpr64 $ mangleIndexTree regoff
+
iselExpr64 (CmmLit (CmmInt i _)) = do
Reg64 rhi rlo <- getNewReg64
let
@@ -1183,24 +1185,25 @@ genCondJump id bool prediction = do
-- @get_arg@, which moves the arguments to the correct registers/stack
-- locations. Apart from that, the code is easy.
-genCCall :: ForeignTarget -- function to call
+genCCall :: Platform
+ -> ForeignTarget -- function to call
-> [CmmFormal] -- where to put the result
-> [CmmActual] -- arguments (of mixed type)
-> NatM InstrBlock
-genCCall (PrimTarget MO_AcquireFence) _ _
+genCCall _ (PrimTarget MO_AcquireFence) _ _
= return $ unitOL LWSYNC
-genCCall (PrimTarget MO_ReleaseFence) _ _
+genCCall _ (PrimTarget MO_ReleaseFence) _ _
= return $ unitOL LWSYNC
-genCCall (PrimTarget MO_SeqCstFence) _ _
+genCCall _ (PrimTarget MO_SeqCstFence) _ _
= return $ unitOL HWSYNC
-genCCall (PrimTarget MO_Touch) _ _
+genCCall _ (PrimTarget MO_Touch) _ _
= return $ nilOL
-genCCall (PrimTarget (MO_Prefetch_Data _)) _ _
+genCCall _ (PrimTarget (MO_Prefetch_Data _)) _ _
= return $ nilOL
-genCCall (PrimTarget (MO_AtomicRMW width amop)) [dst] [addr, n]
+genCCall _ (PrimTarget (MO_AtomicRMW width amop)) [dst] [addr, n]
= do let fmt = intFormat width
reg_dst = getLocalRegReg dst
(instr, n_code) <- case amop of
@@ -1250,7 +1253,7 @@ genCCall (PrimTarget (MO_AtomicRMW width amop)) [dst] [addr, n]
(n_reg, n_code) <- getSomeReg n
return (op dst dst (RIReg n_reg), n_code)
-genCCall (PrimTarget (MO_AtomicRead width _)) [dst] [addr]
+genCCall _ (PrimTarget (MO_AtomicRead width _)) [dst] [addr]
= do let fmt = intFormat width
reg_dst = getLocalRegReg dst
form = if widthInBits width == 64 then DS else D
@@ -1277,12 +1280,12 @@ genCCall (PrimTarget (MO_AtomicRead width _)) [dst] [addr]
-- This is also what gcc does.
-genCCall (PrimTarget (MO_AtomicWrite width _)) [] [addr, val] = do
+genCCall _ (PrimTarget (MO_AtomicWrite width _)) [] [addr, val] = do
code <- assignMem_IntCode (intFormat width) addr val
return $ unitOL HWSYNC `appOL` code
-genCCall (PrimTarget (MO_Cmpxchg width)) [dst] [addr, old, new]
- | width == W32 || width == W64
+genCCall platform (PrimTarget (MO_Cmpxchg width)) [dst] [addr, old, new]
+ | width == W32 || (width == W64 && not (target32Bit platform))
= do
(old_reg, old_code) <- getSomeReg old
(new_reg, new_code) <- getSomeReg new
@@ -1311,9 +1314,8 @@ genCCall (PrimTarget (MO_Cmpxchg width)) [dst] [addr, old, new]
format = intFormat width
-genCCall (PrimTarget (MO_Clz width)) [dst] [src]
- = do platform <- getPlatform
- let reg_dst = getLocalRegReg dst
+genCCall platform (PrimTarget (MO_Clz width)) [dst] [src]
+ = do let reg_dst = getLocalRegReg dst
if target32Bit platform && width == W64
then do
RegCode64 code vr_hi vr_lo <- iselExpr64 src
@@ -1361,9 +1363,8 @@ genCCall (PrimTarget (MO_Clz width)) [dst] [src]
let cntlz = unitOL (CNTLZ format reg_dst reg)
return $ s_code `appOL` pre `appOL` cntlz `appOL` post
-genCCall (PrimTarget (MO_Ctz width)) [dst] [src]
- = do platform <- getPlatform
- let reg_dst = getLocalRegReg dst
+genCCall platform (PrimTarget (MO_Ctz width)) [dst] [src]
+ = do let reg_dst = getLocalRegReg dst
if target32Bit platform && width == W64
then do
let format = II32
@@ -1425,9 +1426,8 @@ genCCall (PrimTarget (MO_Ctz width)) [dst] [src]
, SUBFC dst r' (RIImm (ImmInt (format_bits)))
]
-genCCall target dest_regs argsAndHints
- = do platform <- getPlatform
- case target of
+genCCall platform target dest_regs argsAndHints
+ = do case target of
PrimTarget (MO_S_QuotRem width) -> divOp1 True width
dest_regs argsAndHints
PrimTarget (MO_U_QuotRem width) -> divOp1 False width
=====================================
docs/users_guide/rtd-theme/layout.html
=====================================
@@ -32,7 +32,7 @@
{%- if css|attr("rel") %}
{%- else %}
- <link rel="stylesheet" href="{{ pathto(css, 1) }}" type="text/css" />
+ <link rel="stylesheet" href="{{ pathto(css.filename, 1) }}" type="text/css" />
{%- endif %}
{%- endfor %}
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/compare/249d3c59efffe209ba8293339575e50...
--
View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/compare/249d3c59efffe209ba8293339575e50...
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