Hello All! I had some interesting conversations yesterday with a few folks and the take away was that I might experiment with adding an off by default rts flag that on applicable architectures that makes all floating point computations that yield Nans signaling , plus mayve some HS side hooks to enable or disable that per green thread if it doesn't harm no fib. Kinda like the way green threads track and save / restore the state of the magic c error tracking variable Would this be something folks would be open to adding once I hack it out? Most modern CPUs have some built in support for this, but having better rts integration might make things way nicer. Plus part of the point of the sheer diversity of Nans as per the IEEE report is to encode the nature of the source of the nan error. (There are other parts of IEEE that I think should be ignored / we should change the behavior in a way that disagrees with IEEE choices that hinder debugging and such )