Re: simd branch ready for review

If I understand the code correctly, you use __GLASGOW_HASKELL_LLVM__ to make sure that AVX instructions are available. But using LLVM is no guarantee for that; it depends on what -m flags are passed to LLVM. Presumably LLVM already does what I suggest and lower vector instructions to different instructions, depending on the actual compilation target. Or does it fail altogether if the target architecture doesn't support vector instructions?