Simon Marlow
I'm not sure what you did to get to this point, but let me elaborate on what I think is needed:
- Add primops for the conversions - Add appropriate MachOps for the conversions (F32 -> I32, F64 -> I64) - Make sure the primops get compiled into the appropriate MachOps (see StgCmmPrim) - Implement those MachOps in the native code generator (X86/CodeGen.hs).
For this part you'll need to figure out what the appropriate x86/x86_64 instructions to generate are; it may be that you need to go via memory, which would be unfortunate.
Ömer, LLVM can be a useful tool for working out proper instruction generation. You may find this LLVM snippet helpful (along with some simplified output), $ cat hi.ll define i32 @float_to_int(float %x) { %x1 = fadd float 1.0, %x; %y = bitcast float %x1 to i32; ret i32 %y; } define i64 @double_to_int(double %x) { %x1 = fadd double 0.1, %x; %y = bitcast double %x1 to i64; ret i64 %y; } $ llc hi.ll --march=x86 && cat hi.s float_to_int: # @float_to_int fld1 fadds 8(%esp) fstps (%esp) movl (%esp), %eax popl %edx retl double_to_int: # @double_to_int fldl 16(%esp) faddl .LCPI1_0 fstpl (%esp) movl (%esp), %eax movl 4(%esp), %edx addl $12, %esp retl $ llc hi.ll --march=x86_64 && cat hi.s float_to_int: # @float_to_int addss .LCPI0_0(%rip), %xmm0 movd %xmm0, %eax double_to_int: # @double_to_int addsd .LCPI1_0(%rip), %xmm0 movd %xmm0, %rax retq