#10375: arm: ghci hits an illegal instruction -------------------------------------+------------------------------------- Reporter: erikd | Owner: Type: bug | Status: new Priority: high | Milestone: 7.10.3 Component: Runtime System | Version: 7.10.1 (Linker) | Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: arm Type of failure: GHCi crash | Test Case: Blocked By: | Blocking: Related Tickets: | Differential Revisions: -------------------------------------+------------------------------------- Comment (by erikd): On irc, @bgamari suggested that this problem may just be a failure to flush the instruction caches. On inspecting the code and adding debug printf statements, found that the instruction cache is indeed being flushed. Futhermore cache flushing on arm/linux only works if it was allocated using `mmap()` with the `PROT_EXEC` flag set. I have also confirmed that this is case. Since this issue of a `SIGILL` in seemingly correct and valid code only happens when I try to break on `watch $lr == 0x70000000` I'm going to chalk this up to an GDB related Heisenburg-like interaction between GDB and the debug target. -- Ticket URL: http://ghc.haskell.org/trac/ghc/ticket/10375#comment:59 GHC http://www.haskell.org/ghc/ The Glasgow Haskell Compiler