#10375: arm: ghci hits an illegal instruction -------------------------------------+--------------------------------- Reporter: erikd | Owner: Type: bug | Status: new Priority: high | Milestone: 7.10.3 Component: GHCi | Version: 7.10.1 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: arm Type of failure: GHCi crash | Test Case: Blocked By: | Blocking: Related Tickets: | Differential Revisions: -------------------------------------+--------------------------------- Comment (by erikd): Got some help from the llvm-dev mailing list. People there pointed out that this: {{{ (gdb) disassemble Dump of assembler code for function stg_ap_v_fast: 0x03ff9db4 <+0>: push {r7, lr} 0x03ff9db6 <+2>: sub sp, #32 0x03ff9db8 <+4>: add r7, sp, #0 0x03ff9dba <+6>: ldr r3, [pc, #508] ; (0x3ff9fb8 <stg_ap_v_fast+516>) => 0x03ff9dbc <+8>: ldr r3, [r3, #0] 0x03ff9dbe <+10>: and.w r3, r3, # }}} show the CPU executing Thumb instructions. Thumb instructions are encoded in two btyes (and hence instructions with addresses that are even) while Arm instructions are encoded in 4 bytes (so instructions should be aligned at 4 bytes offsets). This could be that GDB getting the CPU mode incorrect. Not sure how to figure out if that is the case or even if and how that could happen. -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/10375#comment:44> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler