#7976: Failure building master (perf) on i686-pc-linux-gnu --------------------------------+------------------------------------------- Reporter: nickie | Owner: Type: bug | Status: new Priority: normal | Component: Compiler Version: 7.7 | Keywords: Os: Linux | Architecture: x86 Failure: Building GHC failed | Blockedby: Blocking: | Related: --------------------------------+------------------------------------------- Comment(by int-e): We have discussed the following patch briefly on #ghc: {{{ diff --git a/compiler/nativeGen/X86/CodeGen.hs b/compiler/nativeGen/X86/CodeGen.hs index 7c58114..84f19b7 100644 --- a/compiler/nativeGen/X86/CodeGen.hs +++ b/compiler/nativeGen/X86/CodeGen.hs @@ -1658,6 +1658,20 @@ genCCall _ (PrimTarget MO_Touch) _ _ = return nilOL genCCall _ (PrimTarget MO_Prefetch_Data) _ _ = return nilOL +genCCall is32Bit (PrimTarget (MO_BSwap W64)) [dst] [src] | is32Bit = do + dflags <- getDynFlags + let platform = targetPlatform dflags + let dst_rlo = getRegisterReg platform False (CmmLocal dst) + dst_rhi = getHiVRegFromLo dst_rlo + ChildCode64 vcode rlo <- iselExpr64 src + let rhi = getHiVRegFromLo rlo + -- XXX: can we be sure that the registers rlo/rhi and dst_rlo/dst_rhi don't overlap? + return $ vcode `appOL` + toOL [ MOV II32 (OpReg rlo) (OpReg dst_rhi), + MOV II32 (OpReg rhi) (OpReg dst_rlo), + BSWAP II32 dst_rhi, + BSWAP II32 dst_rlo ] + genCCall _ (PrimTarget (MO_BSwap width)) [dst] [src] = do dflags <- getDynFlags let platform = targetPlatform dflags }}} With it, building on x86 works, and the bswap test (cgrun072) passes. But the patch needs somebody who knows the code generator better than I to figure out whether the registers {{{rlo,rhi}}} may clash with {{{dst_rlo,dst_rhi}}}, in which case the resulting code would be incorrect. -- Ticket URL: http://hackage.haskell.org/trac/ghc/ticket/7976#comment:1 GHC http://www.haskell.org/ghc/ The Glasgow Haskell Compiler