#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by gmainland): I have way to much on my plate at the moment to do anything other than answer questions, although I am happy to do that. The hasSSE1 test is vacuously true on x86_64. So it doesn't affect code correctness, but it is confusing. I was wrong about needing the test at all on x32. We could make GHC pass Floats and Double on the stack when SSE is off, pass Floats in registers when -msse is set, and pass both Floats and Doubles (an vectors) in registers when -msse2 is set. The test wouldn't be necessary, because if -msse2 isn't set, GHC will simply pass Doubles on the stack and LLVM will never see a function call with a double-precision argument. I'm not concerned with 32-bit performance at this point. Do you have an application that requires these changes for performance reasons? If you do, I still don't think it's worth making changes to the 32-bit LLVM calling conventions until we can utilize them in GHC. Simply changing the GHC calling convention in LLVM isn't enough, even when using the LLVM back-end. -- Ticket URL: http://ghc.haskell.org/trac/ghc/ticket/8033#comment:23 GHC http://www.haskell.org/ghc/ The Glasgow Haskell Compiler