#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by carter): @gmainland, is the sse2 test always true on x86_64? Thats my concern, that -msse on x86_64 will be "wrong" with GHC head now that we have SIMD support. Unless LLVM does the right instruction lowering / register transfers when trying to use sse2 when set to -msse -- Ticket URL: http://ghc.haskell.org/trac/ghc/ticket/8033#comment:24 GHC http://www.haskell.org/ghc/ The Glasgow Haskell Compiler