On Tue, 2008-08-19 at 23:55 +1000, Ben Lippmeier wrote:
On 19/08/2008, at 8:57 PM, Ian Lynagh wrote:
On Mon, Aug 18, 2008 at 09:20:54PM +1000, Ben Lippmeier wrote:
Ian: Did this problem result in Intel CC / GCC register allocator freakouts?
Have you got me confused with someone else? I don't think I've ever used Intel CC.
Sorry, I couldn't find the rest of the preceding message. Someone wrote that they had to turn down cc flags to get SHA1.hs to compile on IA64.
Yep.
What C compiler was being used, and what were the symptoms?
GCC. As I recall the symptoms were that gcc used more than 32 registers and then the mangler balked. The reason is that a registerised ia64 build expects to only use the first 32 registers but does not take any precautions to make sure that this is the case. It just relies on the fact that most code coming out of the ghc backend cannot make use of more than a handful of registers. If gcc does actually use more then the mangler catches this. We tried some flags to make gcc restrict itself to a subset of the registers but could not get it to obey. Duncan