
26 Feb
2009
26 Feb
'09
5:33 p.m.
Greetings, I've heard about the Reduceron (graph reduction machine in FPGA), and also FRP (functional reactive programming). What sort of features/capabilities/architecture would you expect from a processor that will be designed a-priori for FRP programming? I guess it will need graph-reduction capabilities for the Functional in FRP, but what other tools do we need or can we take advantage of for the Reactive Programming? I haven't thought about this much yet, just a question that came to mind. Any thoughts? - Noam