Essentially not at present; but it's high on our list. Because of the fun we've been having with Software Transactional Memory (STM), which will be in GHC 6.4, and because of the multi-core machines that are coming right now, Simon and I are starting to think much more about genuine hardware concurrency, esp on multi-cores. We have not actually done anything yet, but I think we will soon. STM is described in a PPoPP paper on my home page http://research.microsoft.com/%7Esimonpj/papers/stm/index.htm Simon | -----Original Message----- | From: haskell-bounces@haskell.org [mailto:haskell-bounces@haskell.org] On Behalf Of S. Alexander | Jacobson | Sent: 24 February 2005 15:55 | To: Haskell Mailing List | Subject: [Haskell] par and forkIO | | Multicore and multi-cpu machines are getting more and more common. | | e.g. http://www.anandtech.com/systems/showdoc.aspx?i=2354&p=2 | and | http://www.electronicsweekly.com/articles/article.asp?liArticleID=38887& liArticleTypeID=1&liCategory | ID=1&liChannelID=114&liFlavourID=1&sSearch=&nPage=1 | | Do the current implementations of par and forkIO in e.g. GHC take | advantage multiple CPUs/cores or is special plumbing needed (GPH?)? | | -Alex- | | ______________________________________________________________ | S. Alexander Jacobson tel:917-770-6565 http://alexjacobson.com | _______________________________________________ | Haskell mailing list | Haskell@haskell.org | http://www.haskell.org/mailman/listinfo/haskell
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Simon Peyton-Jones