Marge Bot pushed to branch master at Glasgow Haskell Compiler / GHC Commits: c2a78cea by Peng Fan at 2025-08-05T18:37:27-04:00 NCG/LA64: implement atomic write with finer-grained DBAR hints Signed-off-by: Peng Fan <fanpeng@loongson.cn> - - - - - 1 changed file: - compiler/GHC/CmmToAsm/LA64/CodeGen.hs Changes: ===================================== compiler/GHC/CmmToAsm/LA64/CodeGen.hs ===================================== @@ -1972,9 +1972,17 @@ genCCall target dest_regs arg_regs = do (val, fmt_val, code_val) <- getSomeReg val_reg let instrs = case ord of MemOrderRelaxed -> unitOL $ ann moDescr (ST fmt_val (OpReg w val) (OpAddr $ AddrReg p)) - -- implement with AMSWAPDB - MemOrderRelease -> unitOL $ ann moDescr (AMSWAPDB fmt_val (OpReg w zeroReg) (OpReg w val) (OpReg w p)) - MemOrderSeqCst -> unitOL $ ann moDescr (AMSWAPDB fmt_val (OpReg w zeroReg) (OpReg w val) (OpReg w p)) + -- AMSWAP_DB* insns implentment a fully functional synchronization barrier, like DBAR 0x0. + -- This is terrible. And AMSWAPDB only supports ISA version greater than LA64V1_0. So, + -- implement with DBAR + MemOrderRelease -> toOL [ + ann moDescr (DBAR HintRelease), + ST fmt_val (OpReg w val) (OpAddr $ AddrReg p) + ] + MemOrderSeqCst -> toOL [ + ann moDescr (DBAR HintSeqcst), + ST fmt_val (OpReg w val) (OpAddr $ AddrReg p) + ] _ -> panic $ "Unexpected MemOrderAcquire on an AtomicWrite" ++ show mo moDescr = (text . show) mo code = View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/c2a78cea95d2d6cdd26a1c42556aad1f... -- View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/c2a78cea95d2d6cdd26a1c42556aad1f... You're receiving this email because of your account on gitlab.haskell.org.