[Git][ghc/ghc][master] NCG/LA64: Implement MO_BSwap and MO_BRev with bit-manipulation Instructions
Marge Bot pushed to branch master at Glasgow Haskell Compiler / GHC Commits: 89e8ff3d by Peng Fan at 2025-09-23T20:42:37-04:00 NCG/LA64: Implement MO_BSwap and MO_BRev with bit-manipulation Instructions - - - - - 3 changed files: - compiler/GHC/CmmToAsm/LA64/CodeGen.hs - compiler/GHC/CmmToAsm/LA64/Instr.hs - compiler/GHC/CmmToAsm/LA64/Ppr.hs Changes: ===================================== compiler/GHC/CmmToAsm/LA64/CodeGen.hs ===================================== @@ -1805,6 +1805,49 @@ genCCall target dest_regs arg_regs = do where shift = (widthToInt w) + PrimTarget (MO_BSwap w) + | w `elem` [W16, W32, W64], + [arg_reg] <- arg_regs, + [dest_reg] <- dest_regs -> do + platform <- getPlatform + (reg_x, _, code_x) <- getSomeReg arg_reg + let dst_reg = getRegisterReg platform (CmmLocal dest_reg) + case w of + W64 -> return ( code_x `appOL` toOL + [ + REVBD (OpReg w dst_reg) (OpReg w reg_x) + ]) + W32 -> return ( code_x `appOL` toOL + [ + REVB2W (OpReg w dst_reg) (OpReg w reg_x) + ]) + _ -> return ( code_x `appOL` toOL + [ + REVB2H (OpReg w dst_reg) (OpReg w reg_x) + ]) + | otherwise -> unsupported (MO_BSwap w) + + PrimTarget (MO_BRev w) + | w `elem` [W8, W16, W32, W64], + [arg_reg] <- arg_regs, + [dest_reg] <- dest_regs -> do + platform <- getPlatform + (reg_x, _, code_x) <- getSomeReg arg_reg + let dst_reg = getRegisterReg platform (CmmLocal dest_reg) + case w of + W8 -> return ( code_x `appOL` toOL + [ + BITREV4B (OpReg W32 reg_x) (OpReg W32 reg_x), + AND (OpReg W64 dst_reg) (OpReg W64 reg_x) (OpImm (ImmInt 255)) + ]) + W16 -> return ( code_x `appOL` toOL + [ + BITREV (OpReg W64 reg_x) (OpReg W64 reg_x), + SRL (OpReg W64 dst_reg) (OpReg W64 reg_x) (OpImm (ImmInt 48)) + ]) + _ -> return ( code_x `snocOL` BITREV (OpReg w dst_reg) (OpReg w reg_x)) + | otherwise -> unsupported (MO_BRev w) + -- mop :: CallishMachOp (see GHC.Cmm.MachOp) PrimTarget mop -> do -- We'll need config to construct forien targets @@ -1939,8 +1982,6 @@ genCCall target dest_regs arg_regs = do MO_PopCnt w -> mkCCall (popCntLabel w) MO_Pdep w -> mkCCall (pdepLabel w) MO_Pext w -> mkCCall (pextLabel w) - MO_BSwap w -> mkCCall (bSwapLabel w) - MO_BRev w -> mkCCall (bRevLabel w) -- or a possibly side-effecting machine operation mo@(MO_AtomicRead w ord) ===================================== compiler/GHC/CmmToAsm/LA64/Instr.hs ===================================== @@ -126,8 +126,7 @@ regUsageOfInstr platform instr = case instr of REVHD dst src1 -> usage (regOp src1, regOp dst) BITREV4B dst src1 -> usage (regOp src1, regOp dst) BITREV8B dst src1 -> usage (regOp src1, regOp dst) - BITREVW dst src1 -> usage (regOp src1, regOp dst) - BITREVD dst src1 -> usage (regOp src1, regOp dst) + BITREV dst src1 -> usage (regOp src1, regOp dst) BSTRINS _ dst src1 src2 src3 -> usage (regOp src1 ++ regOp src2 ++ regOp src3, regOp dst) BSTRPICK _ dst src1 src2 src3 -> usage (regOp src1 ++ regOp src2 ++ regOp src3, regOp dst) MASKEQZ dst src1 src2 -> usage (regOp src1 ++ regOp src2, regOp dst) @@ -309,8 +308,7 @@ patchRegsOfInstr instr env = case instr of REVHD o1 o2 -> REVHD (patchOp o1) (patchOp o2) BITREV4B o1 o2 -> BITREV4B (patchOp o1) (patchOp o2) BITREV8B o1 o2 -> BITREV8B (patchOp o1) (patchOp o2) - BITREVW o1 o2 -> BITREVW (patchOp o1) (patchOp o2) - BITREVD o1 o2 -> BITREVD (patchOp o1) (patchOp o2) + BITREV o1 o2 -> BITREV (patchOp o1) (patchOp o2) BSTRINS f o1 o2 o3 o4 -> BSTRINS f (patchOp o1) (patchOp o2) (patchOp o3) (patchOp o4) BSTRPICK f o1 o2 o3 o4 -> BSTRPICK f (patchOp o1) (patchOp o2) (patchOp o3) (patchOp o4) MASKEQZ o1 o2 o3 -> MASKEQZ (patchOp o1) (patchOp o2) (patchOp o3) @@ -700,8 +698,7 @@ data Instr | REVHD Operand Operand | BITREV4B Operand Operand | BITREV8B Operand Operand - | BITREVW Operand Operand - | BITREVD Operand Operand + | BITREV Operand Operand | BSTRINS Format Operand Operand Operand Operand | BSTRPICK Format Operand Operand Operand Operand | MASKEQZ Operand Operand Operand @@ -824,8 +821,7 @@ instrCon i = REVHD{} -> "REVHD" BITREV4B{} -> "BITREV4B" BITREV8B{} -> "BITREV8B" - BITREVW{} -> "BITREVW" - BITREVD{} -> "BITREVD" + BITREV{} -> "BITREV" BSTRINS{} -> "BSTRINS" BSTRPICK{} -> "BSTRPICK" MASKEQZ{} -> "MASKEQZ" ===================================== compiler/GHC/CmmToAsm/LA64/Ppr.hs ===================================== @@ -802,8 +802,9 @@ pprInstr platform instr = case instr of -- BITREV.{W/D} BITREV4B o1 o2 -> op2 (text "\tbitrev.4b") o1 o2 BITREV8B o1 o2 -> op2 (text "\tbitrev.8b") o1 o2 - BITREVW o1 o2 -> op2 (text "\tbitrev.w") o1 o2 - BITREVD o1 o2 -> op2 (text "\tbitrev.d") o1 o2 + BITREV o1 o2 + | OpReg W32 _ <- o2 -> op2 (text "\tbitrev.w") o1 o2 + | OpReg W64 _ <- o2 -> op2 (text "\tbitrev.d") o1 o2 -- BSTRINS.{W/D} BSTRINS II64 o1 o2 o3 o4 -> op4 (text "\tbstrins.d") o1 o2 o3 o4 BSTRINS II32 o1 o2 o3 o4 -> op4 (text "\tbstrins.w") o1 o2 o3 o4 View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/89e8ff3d12689d73481cdb68d7408fd4... -- View it on GitLab: https://gitlab.haskell.org/ghc/ghc/-/commit/89e8ff3d12689d73481cdb68d7408fd4... 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