July 2013 - ghc-tickets

Re: [GHC] #4001: Implement an atomic readMVar
by GHC 09 Jul '13

09 Jul '13

#4001: Implement an atomic readMVar ----------------------------+---------------------------------------------- Reporter: | Owner: ezyang simonmar | Status: new Type: task | Milestone: 7.6.2 Priority: low | Version: 6.12.2 Component: Runtime | Keywords: System | Architecture: Unknown/Multiple Resolution: | Difficulty: Moderate (less than a day) Operating System: | Blocked By: Unknown/Multiple | Related Tickets: Type of failure: | None/Unknown | Test Case: | Blocking: | ----------------------------+---------------------------------------------- Comment (by ezyang): Ah, found the bug... -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/4001#comment:20> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #4001: Implement an atomic readMVar
by GHC 09 Jul '13

09 Jul '13

#4001: Implement an atomic readMVar ----------------------------+---------------------------------------------- Reporter: | Owner: ezyang simonmar | Status: new Type: task | Milestone: 7.6.2 Priority: low | Version: 6.12.2 Component: Runtime | Keywords: System | Architecture: Unknown/Multiple Resolution: | Difficulty: Moderate (less than a day) Operating System: | Blocked By: Unknown/Multiple | Related Tickets: Type of failure: | None/Unknown | Test Case: | Blocking: | ----------------------------+---------------------------------------------- Comment (by ezyang): While testing, I discovered this program spins infinitely when run through ghci (all the compiled ways are fine): {{{ module Main where import GHC.MVar import Control.Concurrent main = do m <- newEmptyMVar sync <- newEmptyMVar let f = atomicReadMVar m t1 <- forkIO (f >> error "FAILURE") t2 <- forkIO (f >> putMVar sync ()) killThread t1 putMVar m (0 :: Int) atomicReadMVar sync }}} Does ghci have any sort of special MVar handling? -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/4001#comment:19> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #8033: add AVX register support to llvm calling convention
by GHC 09 Jul '13

09 Jul '13

#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by gmainland): SSE (the original) only allowed short vectors of 4 single-precision floating point values. So yes, I think the current version is buggy, and strictly speaking incorrect! With SSE1 (only), you cannot put Double arguments into XMM*. -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8033#comment:21> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #8033: add AVX register support to llvm calling convention
by GHC 09 Jul '13

09 Jul '13

#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by carter): So does this mean that the version LLVM has is currently buggy? https://github.com/llvm- mirror/llvm/blob/master/lib/Target/X86/X86CallingConv.td#L289 (Note that a number of other conventions seem to use ) it uses the "hasSSE1()" check currently. That said, most of the useful SSE features / simd capabilities don't happen till sse2... so not terribly useful for us strictly speaking, it is correct, in SSE1 there are XMM0-7, though the only simd operations available then are for Floats. SSE2 gets the Word + Double simd primops. Likewise XMM8-15 start being available in sse3 sse2 started being in intel and amd chips 2001-2003, and sse3 landed in 2004. -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8033#comment:20> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #8033: add AVX register support to llvm calling convention
by GHC 09 Jul '13

09 Jul '13

#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by gmainland): Shouldn't that be hasSSE2, not hasSSE1? -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8033#comment:19> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #8033: add AVX register support to llvm calling convention
by GHC 09 Jul '13

09 Jul '13

#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by carter): {{{ // Pass in STG registers for floats, doubles and 128bit simd vectors CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCIfSubtarget<"hasSSE1()", CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>>, // Pass in STG registers for 256bit simd vectors CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], CCIfSubtarget<"hasAVX()", CCAssignToReg<[YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6]>>> }}} will be added to both stanzas then -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8033#comment:18> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #8033: add AVX register support to llvm calling convention
by GHC 09 Jul '13

09 Jul '13

#8033: add AVX register support to llvm calling convention -------------------------------------+------------------------------------ Reporter: carter | Owner: carter Type: task | Status: new Priority: normal | Milestone: Component: Compiler | Version: 7.7 Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by carter): Ok, I'll amend the patch so that the XMM and YMM stanzas are the same for 32bit and 64bit x86. Current 32bit x86 GHC's will still work correctly because they spill all the floating point values to the stack, and I guess we'll figure out manpower wise doing the work to synch up the native code gen to support floating point args too. -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/8033#comment:17> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #7790: Add dummy undefined symbols to indicate ways
by GHC 09 Jul '13

09 Jul '13

#7790: Add dummy undefined symbols to indicate ways -------------------------------------+------------------------------------ Reporter: ezyang | Owner: ezyang Type: task | Status: new Priority: normal | Milestone: 7.8.1 Component: Compiler | Version: Resolution: | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Comment (by ezyang): This is a little more subtle: we can't add the undefined symbol at link step, because we want .o files to have the undefined symbols as well. And we need it to happen for all native code generation backends; thus, it has to happen before native code generation. -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/7790#comment:2> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #5687: Friendly Interface for auto-completion of GHCi
by GHC 09 Jul '13

09 Jul '13

#5687: Friendly Interface for auto-completion of GHCi -------------------------------------+------------------------------------ Reporter: linsumang | Owner: Type: feature request | Status: closed Priority: normal | Milestone: 7.6.2 Component: GHCi | Version: 7.2.1 Resolution: fixed | Keywords: Operating System: Unknown/Multiple | Architecture: Unknown/Multiple Type of failure: None/Unknown | Difficulty: Unknown Test Case: | Blocked By: Blocking: | Related Tickets: -------------------------------------+------------------------------------ Changes (by igloo): * status: patch => closed * resolution: => fixed Comment: Applied, thanks -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/5687#comment:10> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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Re: [GHC] #4001: Implement an atomic readMVar
by GHC 09 Jul '13

09 Jul '13

#4001: Implement an atomic readMVar ----------------------------+---------------------------------------------- Reporter: | Owner: ezyang simonmar | Status: new Type: task | Milestone: 7.6.2 Priority: low | Version: 6.12.2 Component: Runtime | Keywords: System | Architecture: Unknown/Multiple Resolution: | Difficulty: Moderate (less than a day) Operating System: | Blocked By: Unknown/Multiple | Related Tickets: Type of failure: | None/Unknown | Test Case: | Blocking: | ----------------------------+---------------------------------------------- Comment (by simonmar): I like it :-) Add some tests & doc, and push it! -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/4001#comment:18> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler

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