#12469: Memory fence on writes to MutVar/Array missing on ARM -------------------------------------+------------------------------------- Reporter: rrnewton | Owner: Type: bug | Status: patch Priority: normal | Milestone: 8.0.2 Component: Compiler | Version: 8.0.1 Resolution: | Keywords: memory model Operating System: Unknown/Multiple | Architecture: Type of failure: Incorrect result | Unknown/Multiple at runtime | Test Case: Blocked By: | Blocking: 12537 Related Tickets: | Differential Rev(s): Phab:D2495 Wiki Page: | Phab:D2525 -------------------------------------+------------------------------------- Comment (by Ben Gamari <ben@…>): In [changeset:"2cb8cc26df6af431d30b6964710ea2d859ca2bcd/ghc" 2cb8cc2/ghc]: {{{ #!CommitTicketReference repository="ghc" revision="2cb8cc26df6af431d30b6964710ea2d859ca2bcd" StgCmmPrim: Add missing write barrier. On architectures with weak memory consistency a write barrier is needed before the write to the pointer array. Fixes #12469 Test Plan: rebuilt Stackage nightly twice on powerpc64le Reviewers: hvr, rrnewton, erikd, austin, simonmar, bgamari Reviewed By: erikd, bgamari Subscribers: thomie Differential Revision: https://phabricator.haskell.org/D2525 GHC Trac Issues: #12469 }}} -- Ticket URL: <http://ghc.haskell.org/trac/ghc/ticket/12469#comment:32> GHC <http://www.haskell.org/ghc/> The Glasgow Haskell Compiler