Nathan, My GHC-iOS is based on HEAD from about November 2012. The register that's used for base is defined in includes/stg/MachRegs.h and is meant to be r4. This has never changed since the ARM work was done. This is likely to be new breakage. One possibility: There are certain versions of llvm that break with GHC and ARM. llvm-3.0 is known to work. I believe this has been fixed since (so new llvm-version should work), but I haven't confirmed it. Looking at the cmm source for stg_returnToStackTop, the use of r0 looks wrong because the comment says it's not using C arguments. r0-r3 are not callee-saves and r0 is normally a C call argument and return value. I just did a compile for Emdebian Linux (but haven't run any generated code yet), and I'm getting almost the same as you: 00000000 <stg_returnToStackTop>: 0: e92d4010 push {r4, lr} 4: e24dd010 sub sp, sp, #16 8: e590108c ldr r1, [r0, #140] ; 0x8c c: e3a04000 mov r4, #0 10: e591200c ldr r2, [r1, #12] 14: e592100c ldr r1, [r2, #12] 18: e580409c str r4, [r0, #156] ; 0x9c 1c: e2822064 add r2, r2, #100 ; 0x64 20: e5904094 ldr r4, [r0, #148] ; 0x94 24: e594c004 ldr ip, [r4, #4] 28: e594e000 ldr lr, [r4] 2c: e594401c ldr r4, [r4, #28] 30: e08e4604 add r4, lr, r4, lsl #12 34: e2444001 sub r4, r4, #1 38: e5804084 str r4, [r0, #132] ; 0x84 3c: e5914000 ldr r4, [r1] 40: e58d200c str r2, [sp, #12] 44: e24c2004 sub r2, ip, #4 48: e1a0e00f mov lr, pc 4c: e1a0f004 mov pc, r4 50: e28dd010 add sp, sp, #16 54: e8bd4010 pop {r4, lr} 58: e1a0f00e mov pc, lr On the iPhone I get this: _stg_returnToStackTop: 00000000 e5946064 ldr r6, [r4, #100] 00000004 e3a03000 mov r3, #0 @ 0x0 00000008 e596600c ldr r6, [r6, #12] 0000000c e596500c ldr r5, [r6, #12] 00000010 e5843074 str r3, [r4, #116] 00000014 e286b064 add fp, r6, #100 @ 0x64 00000018 e594306c ldr r3, [r4, #108] 0000001c e1c300d0 ldrd r0, [r3] 00000020 e593301c ldr r3, [r3, #28] 00000024 e0803603 add r3, r0, r3, lsl #12 00000028 e2416004 sub r6, r1, #4 @ 0x4 0000002c e2433001 sub r3, r3, #1 @ 0x1 00000030 e584305c str r3, [r4, #92] 00000034 e5953000 ldr r3, [r5] 00000038 e12fff33 blx r3 0000003c e12fff1e bx lr A comparison strongly supports your idea that it's using r0 when it should be using r4. I am going to try some different versions of llvm. Steve On 16/01/13 06:59, Nathan Hüsken wrote:
Hey,
I am currently trying to get a ghc cross compiler for android linux to work. I am basing this on the development version (HEAD). I succeeded building the compiler. Unfortunately, the executables produced by the compiler segfault on my android device.
If I do an unregisterised build, it works!
Since the iphone is also an arm platform, I was hoping someone here could help me a little bit.
I investigate the problem a little bit (see this thread: http://www.haskell.org/pipermail/ghc-devs/2013-January/000013.html) and I am guessing (I am no expert) that it is an arm problem, not android.
It seems like the wrong register is used for base (r0 instead of r4).
* On which ghc version is the iphone fork based? * Are there any arm fixes in the iphone fork that could be related to this?
Thank you! Nathan
_______________________________________________ iPhone mailing list iPhone@haskell.org http://www.haskell.org/mailman/listinfo/iphone